Device surface properties are critical for its performance such as channel electron density, leakage current, subthreshold swing (SS), and noise in gallium nitride high-electron-mobility transistors (HEMTs). In this article, the improved surface property of InAlN/GaN HEMTs with forming gas (FG, 5% H ₂ , and 95% N ₂ ) annealing is demonstrated. X-ray photoelectron spectra (XPS) show that the number of Ga–O bonds decreases while that of the Ga–N bonds increases, an indication of the surface native oxide removal after FG annealing. Compared with N ₂ annealing, an increase of two-dimensional electron gas (2DEG) electron density with FG annealing is determined by both energy band simulation and capacitance–voltage measurement. Transmission line measurement (TLM) shows that N ₂ annealing offers a lower ohmic contact resistance ( ${R}_{\text {C}}$ ) while FG annealing features a lower sheet resistance ( ${R}_{\text {sheet}}$ ). Herein, a FG/N ₂ two-step ohmic contact annealing is developed to achieve a SS of 110 mV/dec, a transconductance ( ${g}_{\text {m}}$ ) peak of 415 mS/mm, a record low drain-induced barrier lowing (DIBL) of 65 mV/V, and a record high power gain cutoff frequency ( ${f}_{\text {max}}$ ) of 270 GHz on a 50-nm InAlN/GaN HEMT on Si.

Due to the low cost and the scaling capability of Si substrate, InAlN/GaN high-electron-mobility transistors (HEMTs) on silicon substrate have attracted more and more attentions. In this paper, a high-performance 50-nm-gate-length InAlN/GaN HEMT on Si with a high on/off current (I_on/I_off) ratio of 7.28 × 10⁶, an average subthreshold swing (SS) of 72 mV/dec, a low drain-induced barrier lowing (DIBL) of 88 mV, an off-state three-terminal breakdown voltage (BV_ds) of 36 V, a current/power gain cutoff frequency (f_T/f_max) of 140/215 GHz, and a Johnson’s figure-of-merit (JFOM) of 5.04 THz V is simultaneously demonstrated. The device extrinsic and intrinsic parameters are extracted using equivalent circuit model, which is verified by the good agreement between simulated and measuredS-parameter values. Then the scaling behavior of InAlN/GaN HEMTs on Si is predicted using the extracted extrinsic and intrinsic parameters of devices with different gate lengths (L_g). It presents that af_T/f_maxof 230/327 GHz can be achieved whenL_gscales down to 20 nm with the technology developed in the study, and an improvedf_T/f_maxof 320/535 GHz can be achieved on a 20-nm-gate-length InAlN/GaN HEMT with regrown ohmic contact technology and 30% decreased parasitic capacitance. This study confirms the feasibility of further improvement of InAlN/GaN HEMTs on Si for RF applications.

Metal-oxide thin-film transistors (TFTs) promise to enable lightweight and low-power applications, such as ultrathin active matrix displays and low-cost RF identification tags. However, most reported high-performance metal-oxide TFTs contain high-cost indium and gallium elements, leading to constraints in cost-sensitive application. Herein, we present enhancement-/depletion-mode (E-/D-mode) TiO₂ TFTs via O₂/N₂ preannealing of TiO₂ channel material prior to device fabrication process. It is found that the O₂-annealed TiO₂ TFTs exhibit improved performances compared to N₂-annealed TiO₂ TFTs, including increased mobility (μ), higher on-/off-current ratio (Ion/Ioff), and lower subthreshold swing (SS). This can be attributed to the passivation effects of O₂ annealing, which leads to less oxygen vacancies at the channel and channel/oxide interface. On the other hand, the ionized oxygen vacancies result in the increased electron concentration in N₂-annealed films and, thus, the negative shift of Vth in the TFT performance. This article delivers a possible approach to improve oxide TFT performance by passivation of oxygen vacancies. Furthermore, the controlled annealing process has a great potential in the logic inverter applications when both E- and D-mode TFTs are implemented.

Various surface treatment methods have been previously applied on the GaN high electron mobility transistor (HEMT). In this study, the effects of N ₂ O surface treatment on the electrical properties of InAlN/GaN HEMT were studied. With this surface treatment, the ideality factor of the gate Schottky barrier diode decreases from 7.70 to 1.30, and the barrier height of SBD increases from 0.508 eV to 1.053 eV (~two folds), an indication of the improved Schottky contact characteristic. Negative-shifted threshold voltage, decreased gate capacitance and two-dimensional electron gas (2DEG) electron density were observed. Both the intrinsic transconductance and 2DEG electron mobility are improved. The 2DEG electron mobilities limited by various scattering mechanisms are extracted using two-dimensional (2D) scattering theory. It is found that N ₂ O surface treatment results in the increase of the 2DEG electron mobility due to the weakened polar optical phonon, interface roughness, and polarization Coulomb field scatterings. This study offers a feasible way to further enhance InAlN/GaN HEMT performances by using N ₂ O surface treatment.

We report one-volt TiO ₂ thin film transistors (TFTs) with a low-temperature fabrication process. The TFTs with the 300 °C-annealed TiO ₂ channel exhibit a high on/off current ratio ( I _ON /I _OFF ) of 5.4×10 ⁷ , a low subthreshold swing (SS) of 75 mV/dec and a saturation field effect mobility ( μ _sat ) of 2.13 cm ² ·V ^-1 ·s ^-1 under an ultra-low voltage of 1 V. In contrast, the TFTs with the 200 °C-annealed TiO ₂ channel show no appreciable currents. Such a distinct conductivity difference is attributed to the crystallinity transformation of stoichiometric TiO ₂ , the charge transport of which can be well explained by the multiple-trapping-and-release (MTR) model. The channel/dielectric interfaces of these one-volt TiO ₂ TFTs are further investigated by transmission electron microscopy (TEM), multi-frequency ( f) capacitance-voltage (C-V), and conductance-voltage (G-V) measurements. The interface trap density ( D _it ) values of ~ 5×10 ¹² cm ^-2 ·eV ^-1 obtained from both C-V and G-V measurements are in good agreement, suggesting a high-quality channel/dielectric interface. These one-volt TiO ₂ TFTs show a great potential in emerging applications, such as foldable displays and wearable sensors, where a battery-powered operation is required.