Sleep disorder is a medical disease of the sleep patterns, which commonly suffered by the elderly. Sleep disorders diagnosis and treatment are considered to be challenging due to a time-consuming and inconvenient process for the patient. Moreover, the use of Polysomnography (PSG) in sleep disorder diagnosis is a high-cost process. Therefore, we propose an efficient classification method of sleep disorder by merely using electrocardiography (ECG) signals to simplify the sleep disorders diagnosis process. Different from many current related studies that applied a five-minute epoch to observe the main frequency band of the ECG signal, we perform a pre-processing technique that suitable for the 30-seconds epoch of the ECG signal. By this simplification, the proposed method has a low computational cost so that suitable to be implemented in an embedded hardware device. Structurally, the proposed method consists of five stages: (1) pre-processing, (2) spectral features extraction, (3) sleep stage detection using the Decision-Tree-Based Support Vector Machine (DTB-SVM), (4) assess the sleep quality features, and (5) sleep disorders classification using ensemble of bagged tree classifiers. We evaluate the effectiveness of the proposed method in the task of classifying the sleep disorders into four classes (insomnia, Sleep-Disordered Breathing (SDB), REM Behavior Disorder (RBD), and healthy subjects) from the 51 patients of the Cyclic Alternating Pattern (CAP) sleep data. Based on experimental results, the proposed method presents 84.01% of sensitivity, 94.17% of specificity, 86.27% of overall accuracy, and 0.70 of Cohen’s kappa. This result indicates that the proposed method able to reliably classify the sleep disorders merely using the 30-seconds epoch ECG in order to address the issue of a multichannel signal such as the PSG.
Real stressed speech is affected by various aspects (individual characteristics and environment) so that the stress patterns are diverse and different on each individual. To this end, in our previous work, we performed an unsupervised clustering method that able to self-learning manner by mapping the feature representations of the stress speech and clustering tasks simultaneously, called deep time-delay embedded clustering (DTEC). However, DTEC has not confirmed yet the compatibility between the output class and informational classes. Therefore, we proposed semi-supervised time-delay embedded clustering (SDTEC) as a new framework of semi-supervised in DTEC. SDTEC incorporates the prior information of pairwise constraints in the embedding layer and simultaneously learns the feature representation and the clustering assignments. The prior information was used to guide the clustering procedure so that the points that belong to the incorrect cluster can be corrected. The effectiveness of the proposed SDTEC was evaluated by comparing it with some baseline methods in terms of the clustering error rate (CER). Moreover, to demonstrate SDTEC’s capabilities, we conducted a comprehensive ablation study. Based on experiment results, SDTEC outperformed the baseline methods and achieves state-of-the-art results in semi-supervised clustering.
24 June 2013 in International Journal of Intelligent Computing in Medical Sciences & Image Processing
In this paper, we introduce the mouse cursor control system for Amyotrophic Lateral Sclerosis patients using electrooculogram signals. We propose the algorithm using alternating current and direct current of electrooculogram signals corresponding to the baseline drift problem. The focus of our proposal system was laid on noise, baseline drift and eye blink artifact removal. In order to test the effectiveness of our proposal system, we tried the experiments of the Alphabet sentence input task using our proposal system.
Speech activity detection (SAD) or sometimes called voice activity detection (VAD), is a crucial part of most speech-related applications. The SAD system serves to ensure the primary system processes only speech segments. Many speech-based systems have reported that detection accuracy is thanks to the robustness of their SAD system. Various SAD methods have been explored and enhanced in addressing noisy environments, but a few of them notice the emotional condition of the speakers. Whereas, in real conditions, emotions (such as stress) can pose a considerable impact on SAD system performance. In this paper, we propose a compact SAD system that is able to harmonize with the altered speech characteristics due to the presence of emotion and also powerful in high noise conditions. Since there is a similarity between emotional effect and channel effect, the advantages of the proposed SAD system is the applied of a new channel compensation scheme (termed as embedded discriminant analysis, EDA) that works in the i-vector space. We design the EDA in such a way so that it could compensate the presence of emotional condition. EDA transforms original i-vector to a lower-dimensional denoise embedding space. We develop EDA as simple and efficient as the linear discriminant analysis (LDA). The cosine similarity algorithm is applied to calculate the resemblance score between the audio target and the speech/non-speech models, and also for deciding the decision threshold. The effectiveness of the proposed SAD system is evaluated in the clustering task of Speech Under Simulated and Actual Stress (SUSAS) data, that aimed for the stress speech clustering (SSC) system. Contribution-We propose a SAD system which not only strong in noisy environments but also be able to compensate the presence of emotional conditions.
1 February 2020 in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
In this paper, we propose the low voltage CMOS current mode reference circuit using self-regulator with adaptive biasing technique. It drastically reduces the line sensitivity (LS) of the output voltage and the power supply voltage dependence of the temperature coefficient (TC). The self-regulator used in the proposed circuit adaptively generates the minimum voltage required the reference core circuit following the PVT (process, voltage and temperature) conditions. It makes possible to improve circuit performances instead of slightly increasing minimum power supply voltage. This proposed circuit has been designed and evaluated by SPICE simulation using TSMC 65nm CMOS process with 3.3V (2.5V over-drive) transistor option. From simulation results, LS is reduced to 0.0065%/V under 0.8V < VDD < 3.0V. TC is 67.6ppm/°C under the condition that the temperature range is from -40°C to 125°C and VDD range is from 0.8V to 3.0V. The power supply rejection ratio (PSRR) is less than -80.4dB when VDD is higher than 0.8V and the noise frequency is 100Hz. According to the simulation results, we could confirm that the performances of the proposed circuit are improved compared with the conventional circuit.
1 April 2018 in International Journal of Electrical and Computer Engineering (IJECE)
A CMOS temperature sensor circuit with programmable temperature range is proposed for biomedical applications. The proposed circuit consists of temperature sensor core circuit and programmable temperature range digital interface circuit. Both circuits are able to be operated at 1.0 V. The proposed temperature sensor circuit is operated in weak inversion region of MOSFETs. The proposed digital interface circuit converts current into time using Current-to-Time Converter (ITC) and converts time to digital data using counter. Temperature range can be programmed by adjusting pulse width of the trigger and clock frequency of counter. The proposed circuit was simulated using HSPICE with 1P, 5M, 3-wells, 0.18-μm CMOS process (BSIM3v3.2, LEVEL53). From the simulation of proposed circuit, temperature range is programmed to be 0 °C to 100 °C, it is obtained that resolution of the proposed circuit is 0.392 °C with -0.89/+0.29 °C inaccuracy and the total power consumption is 22.3 μW in 25 °C.