Dong-Seon Lee

Prof. Dr. Dong-Seon Lee

Solid State Lighting Lab, School of Electrical Engineering and Computer Science, Gwangju Institute of Science and Technology, Gwangju 61005, Korea

Research Focus & Metrics

Academic Career Length

23Years (2004-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 February 2014 in CrystEngComm
Verified
Journal Article
Closed access
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BJByung Oh Jung
Byung Oh Jung
SBSi-Young Bae
Si-Young Bae
YKYoshihiro Kato
Yoshihiro Kato
MIMasataka Imura
Masataka Imura
DLDong-Seon Lee
Dong-Seon Lee
HAHiroshi Amano
Hiroshi Amano
In this paper, we demonstrate a scalable process for the precise position-controlled selective growth of GaN nanowire arrays by metalorganic chemical vapor deposition (MOCVD) using a pulsed-mode growth technique. The location, orientation, length, and diameter of each GaN nanowire are controlled via pulsed-mode growth parameters such as growth temperature and precursor injection and interruption durations. The diameter and length of each GaN nanowire are in the ranges of more than 240 nm and 250–1250 nm, respectively, with different vertical-to-lateral aspect ratios that depend on the growth temperature. Also, it is found that a higher growth temperature helps increase the vertical growth rate and reduces the lateral growth rate of GaN nanowire arrays. Furthermore, in the case of longer TMGa injection duration, the Ga-rich region allows the higher lateral growth rate of GaN nanostructures, which leads to a transition in the morphology from nanowires to a thin film, while in the case of longer NH3 injection duration, the surface morphology changes from nanowires to pyramidal structures. In addition, the surface structure can also be controlled by varying the precursor interruption duration. Finally, we report and discuss a growth model for GaN nanowire arrays under pulsed-mode MOCVD growth.

1 July 2019 in Journal of Alloys and Compounds
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Journal Article
Closed access
JJJun Sung Jang
Jun Sung Jang
JKJihun Kim
Jihun Kim
UGUma Ghorpade
Uma Ghorpade
HSHyeong Ho Shin
Hyeong Ho Shin
MGMyeng Gil Gang
Myeng Gil Gang
JKJin Hyeok Kim
Jin Hyeok Kim

25 September 2018 in ACS Photonics
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Journal Article
Closed access
CKChang-Mo Kang
Chang-Mo Kang
JLJun-Yeob Lee
Jun-Yeob Lee
DKDuk-Jo Kong
Duk-Jo Kong
JSJae-Phil Shim
Jae-Phil Shim
SKSanghyeon Kim
Sanghyeon Kim
DLDong-Seon Lee
Dong-Seon Lee

31 January 2017 in Optics Express
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Journal Article
Open access
PDF file
CKChang-Mo Kang
Chang-Mo Kang
DKDuk-Jo Kong
Duk-Jo Kong
JSJae-Phil Shim
Jae-Phil Shim
SKSanghyeon Kim
Sanghyeon Kim
SCSang-Bae Choi
Sang-Bae Choi
DLDong-Seon Lee
Dong-Seon Lee
We report a color tunable display consisting of two passive-matrix micro-LED array chips. The device has combined vertically stacked blue and green passive-matrix LED array chips sandwiched by a transparent bonding material. We demonstrate that vertically stacked blue and green micro-pixels are independently controllable with operation of four color modes. Moreover, the color of each pixel is tunable in the entire wavelength from the blue to green region (450 nm - 540 nm) by applying pulse-width-modulation bias voltage. This study is meaningful in that a dual color micro-LED array with a vertically stacked subpixel structure is realized.

5 April 2018 in ACS Applied Materials & Interfaces
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Journal Article
Closed access
HLHyo-Ju Lee
Hyo-Ju Lee
SOSemi Oh
Semi Oh
KCKi-Yeop Cho
Ki-Yeop Cho
WJWoo-Lim Jeong
Woo-Lim Jeong
DLDong-Seon Lee
Dong-Seon Lee
SPSeong-Ju Park
Seong-Ju Park

10 September 2019 in Nanoscale
Verified
Journal Article
Closed access
PDF file
DGDae-Myeong Geum
Dae-Myeong Geum
SKSeong Kwang Kim
Seong Kwang Kim
CKChang-Mo Kang
Chang-Mo Kang
SMSeung-Hyun Moon
Seung-Hyun Moon
JKJihoon Kyhm
Jihoon Kyhm
SangHyeon KimSangHyeon Kim
SangHyeon Kim
In this study, we proposed a strategy to fabricate vertically stacked subpixel (VSS) micro-light-emitting diodes (μ-LEDs) for future ultrahigh-resolution microdisplays. At first, to vertically stack the LED with different colors, we successfully adopted a bonding-interface-engineered monolithic integration method using SiO2/SiNx distributed Bragg reflectors (DBRs). It was found that an intermediate DBR structure could be used as the bonding layer and color filter, which could reflect and transmit desired wavelengths through the bonding interface. Furthermore, the optically pumped μ-LED array with a pitch of 0.4 μm corresponding to the ultrahigh-resolution of 63 500 PPI could be successfully fabricated using a typical semiconductor process, including electron-beam lithography. Compared with the pick-and-place strategy (limited by machine alignment accuracy), the proposed strategy leads to the fabrication of significantly improved high-density μ-LEDs. Finally, we systematically investigated the effects of surface traps using time-resolved photoluminescence (TRPL) and two-dimensional simulations. The obtained results clearly demonstrated that performance improvements could be possible by employing optimal passivation techniques by diminishing the pixel size for fabricating low-power and highly efficient microdisplays.