The controls of most power electronic inverters connected to an electrical power system (EPS) rely on the precise determination of the voltage magnitude, frequency, and phase angle at the point of common coupling. One of the most widely used approaches for measuring these quantities is the phase-locked loop (PLL); however, the precision of this measurement is affected during transients in the EPS and is a function of the type of event and the architecture of the PLL. PLLs based on the second-order generalized integrator (SOGI) are widely used in power converter synchronization, offering an adaptive or fixed-parameter prefilter with low-pass and band-pass characteristics. This article proposes a variant of the SOGI-PLL that offers improved stability and a faster response time. This is accomplished by decoupling the effect of the SOGI’s gains and adding feedback. The modification is carried out in the state space model of the SOGI. Manipulating the attenuation moves the poles of the SOGI to improve the stability. The performance of the proposed PLL is verified and validated under the processor-in-the-loop (PIL) approach.

The precise calculation of phase angle, voltage magnitude and frequency is crucial for the effective control of power electronic inverters connected to an electrical power system. The phase-locked loop (PLL) is a commonly employed method for measuring these variables. Nevertheless, the reliability of this measurement is influenced by transient events in the electrical power system and varies depending on the nature of the event and the specific design of the PLL. Notably, PLLs utilizing the double second-order generalized integrator are widely adopted for power converter synchronization purposes. This article proposes a three-phase PLL, which is based on the single-phase version previously reported by the authors. The proposed PLL, based on an alternative integrator approach, allows a fine adjustment of the tolerance to disturbances in the input voltage thanks to a second feedback gain in its pre-filter. It is reasonable to anticipate that the three-phase PLL will exhibit similar strengths to the single-phase version; however, in the three-phase case, an additional integrator is involved in pre-filtering the quadrature signals, and the double integrator is not employed as the quadrature signal generator. The performance of the proposed PLL is assessed by comparing it to other PLLs based on the second-order integrator, using a processor-in-the-loop approach.

Current applications in photovoltaic power generation and energy storage require isolated, efficient, and reliable DC-DC converter topologies. However, the design of the nanocrystalline-core medium-frequency transformer (MFT), as a key element of these isolated topologies, often overlooks the impact of specific operating conditions, such as non-sinusoidal input signals and variations in total harmonic distortion (THD). This work introduces an innovative design method customized for a high-efficiency Central-Tapped medium-frequency transformer (CT-MFT) integrated into a SiC-based central-tapped phase-shift full-bridge (CT-PSFB) converter. Unlike earlier proposals, this work considers key parameters in the transformer design, including non-sinusoidal excitation waveforms and changes in THD during converter operation. After the CT-MFT is designed, the CT-MFT/CT-PSFB structure is simulated and validated using a tailor-made prototype. The experimental results confirm the structure’s effectiveness: the CT-MFT achieves 99.65% efficiency, and the CT-PSFB achieves 94.7% average efficiency, with THD up to 22.5% and 97.66% peak efficiency.