Gayathri S

Mrs. Gayathri S

SRM Institute of Science and Technology, Kattankulathur, India

Research Focus & Metrics

Academic Career Length

6Years (2021-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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17 March 2021 in Electronics
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Journal Article
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GSGayathri S
Gayathri S
KRKumar Ramamoorthy
Kumar Ramamoorthy
DSDhanalakshmi Samiappan
Dhanalakshmi Samiappan
GDGerard Dooly
Gerard Dooly
DDDinesh Babu Duraibabu
Dinesh Babu Duraibabu
The implementation of quantum computing processors for scientific applications includes quantum floating points circuits for arithmetic operations. This work adopts the standard division algorithms for floating-point numbers with restoring, non-restoring, and Goldschmidt division algorithms for single-precision inputs. The design proposals are carried out while using the quantum Clifford+T gates set, and resource estimates in terms of numbers of qubits, T-count, and T-depth are provided for the proposed circuits. By improving the leading zero detector (LZD) unit structure, the proposed division circuits show a significant reduction in the T-count when compared to the existing works on floating-point division.

1 October 2024 in IEEE Transactions on Magnetics
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Journal Article
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AKAnant Aravind Kulkarni
Anant Aravind Kulkarni
GSGayathri S
Gayathri S
DDDev Ranjan Das
Dev Ranjan Das
Kaushik Kumar BrajeshKaushik Kumar Brajesh
Kaushik Kumar Brajesh
The quantum computing (QC) imitates particle behavior at the sub-atomic level. Quantum gates are based on the quantum mechanical phenomena such as superposition and entanglement. The obstacle in the realization of reversible computing is the huge number of operations in terms of quantum gates. Therefore, novel designs of reversible computing blocks with minimum number of elementary operations with high fidelity is necessary. Therefore, a novel design of multiplexer is proposed in this paper which is composed of only 1 CNOT and 1-Toffoli gates. Moreover, the reduced decomposition of the multiplexer and its identity rule-based optimization for the spin-torque based n-qubit architecture, is discussed. To validate the design, the QISKIT implementation of the novel design in terms of amplitude, probability, and Q-sphere representation, is carried out. The results are encouraging to realize the reversible computing involving quantum multiplexer as one of the building blocks.

21 July 2026 in Physica Scripta
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Journal Article
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GSGayathri S
Gayathri S
KRKumar Ramamoorthy
Kumar Ramamoorthy
MHMajid Haghparast
Majid Haghparast
Value-at-risk (VaR) is a broadly used measure for evaluating financial tail risk, but its estimation depends on assessing threshold exceeding probabilities over complex loss distributions. Probability estimation tasks using quantum algorithms works based on amplitude estimation that has a potential to offer quadratic speedup; however, their implementation on noisy intermediate-scale quantum devices is obstructed by the qubit and circuit depth requirements of arithmetic-heavy comparator oracles. This work proposes a qubit-efficient Boolean quantum oracle for threshold-based risk screening motivated by VaR analysis that has the ability to directly flag loss scenarios that violate a predefined threshold condition without utilizing high depth quantum adders or quantum subtractors. The proposed oracle employs a risk ancilla together with a reusable work qubit and utilizes a shallow circuit depth, making it a feasible candidate for near-term quantum hardware. In this work we analyze the resource scaling of the proposed oracle and benchmark it against arithmetic-based approaches under noisy simulations. This work further shows how the proposed oracle can be integrated within a hybrid quantum–classical variational optimization framework to restrain high-risk configurations.