Zhenlong Ma

Zhenlong Ma

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Zhenlong Ma

Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

Research Focus & Metrics

Academic Career Length

3Years (2024-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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12 August 2024
Verified
Conference Paper
Open access
JXJing Xu
Jing Xu
ZWZhan Wang
Zhan Wang
FYFan Yang
Fan Yang
NKNing Kang
Ning Kang
ZMZhenlong Ma
Zhenlong Ma
NSNinghui Sun
Ninghui Sun
Congestion control plays a pivotal role in large-scale data centers, facilitating ultra-low latency, high bandwidth, and optimal utilization. Even with the deployment of data center congestion control mechanisms such as DCQCN and HPCC, these algorithms often respond to congestion sluggishly. This sluggishness is primarily due to the slow notification of congestion. It takes almost one round-trip time (RTT) for the congestion information to reach the sender. In this paper, we introduce the Fast Notification Congestion Control (FNCC) mechanism, which achieves sub-RTT notification. FNCC leverages the acknowledgment packet (ACK) from the return path to carry in-network telemetry (INT) information of the request path, offering the sender more timely and accurate INT. To further accelerate the responsiveness of last-hop congestion control, we propose that the receiver notifies the sender of the number of concurrent congested flows, which can be used to adjust the congested flows to a fair rate quickly. Our experimental results demonstrate that FNCC reduces flow completion time by 27.4% and 88.9% compared to HPCC and DCQCN, respectively. Moreover, FNCC triggers minimal pause frames and maintains high utilization even at 400Gbps.

27 January 2025 in IEEE Computer Architecture Letters
Verified
Journal Article
Closed access
ZMZhenlong Ma
Zhenlong Ma
NKNing Kang
Ning Kang
FYFan Yang
Fan Yang
CHChongyang Hong
Chongyang Hong
JXJing Xu
Jing Xu
NSNinghui Sun
Ninghui Sun
RDMA network is being widely deployed in computing clusters. By offloading the network processing protocol stack to hardware, RDMA enables high performance and low CPU overhead. However, the protocol processing demands substantial communication resources, and due to the limited hardware resources, commercial NICs (Network Interface Cards) experience a significant number of cache misses in large-scale connection scenarios. This results in performance degradation, indicating that RDMA lacks scalability. In this paper, we first analyze the characteristics of resource access in RDMA. Based on these characteristics, we propose a resource access prediction and prefetching mechanism in the hardware, which preemptively fetches the resources required by the protocol processing pipeline to the on-chip cache. Evaluation results demonstrate that our approach improves throughput by 125% and reduces latency by 17.9% under large-scale communication scenarios.