An analog memcapacitor has been created by a ferroelectric capacitor. Since the memcapacitor is a capacitor, the power consumption is not dissipated at all in principle. The device structure is that a ferroelectric layer is sandwiched between the bottom electrode and the top electrode. The analog memcapacitor characteristic is realized, namely, varying Vmax is applied, and the capacitance is strongly dependent on it. The working principle can be explained by the operating point analysis for the intrinsic property of the ferroelectric layer. If the memcapacitors are implemented in neuromorphic systems, it is expected that the power consumption will be remarkably reduced. It has been simulated that the spiking neuromorphic system dissipates only 6.24 nJ/Inference for MNIST inference with acceptable accuracy, which is much lower than other systems.

With the increasing demand for high-density implementation and low-power operation of artificial intelligence (AI), inherent limitations of the conventional von Neumann architecture have been recognized, highlighting the development of energy-efficient synaptic devices as a critical issue in neuromorphic systems. In this study, a novel synaptic architecture was proposed based on a 1T1C structure, in which a ferroelectric field-effect transistor (FeFET) is connected in series with a capacitor, to realize analog responses similar to the membrane potential of biological neurons through circuit-level integration based on the 1T1C synaptic behavior. The transfer characteristics of the FeFET were experimentally measured and modeled, and circuit simulations emulating neural network structures reproduced dynamic membrane potential ( ${V} _{\text {mem}}\text {)}$ variations using 196 cells (input-to-hidden layer) and 80 cells (hidden-to-output layer). Through evolutionary symbolic regression, a mathematical model expressing ${\Delta }$ V _mem as a function of ${\Sigma } {G}$ and the preceding ${V} _{\text {mem}}$ was derived, and its implementation in a spiking neural network (SNN) achieved 95.5% recognition accuracy for MNIST image classification. The energy consumption of the synaptic circuit was further estimated to be 239 nJ/inference, and scaling the device dimensions down to the 100-nm regime suggested a reduction to 3.74 pJ/inference. These findings demonstrate the extremely high potential of the proposed approach for ultralow-power operation, indicating that the FeFET–capacitor 1T1C structure constitutes a promising synaptic device architecture for high-density neuromorphic systems and edge AI applications.