Nguyen Anh Vu Doan

Nguyen Anh Vu Doan

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Nguyen Anh Vu Doan

Infineon Technologies AG, Germany

Research Focus & Metrics

Academic Career Length

17Years (2010-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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1 October 2018 in Omega
Verified
Journal Article
Closed access
NDN.A.V. Doan
N.A.V. Doan
YSY. De Smet
Y. De Smet

27 July 2020 in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Verified
Journal Article
Closed access
TKTakuya Kojima
Takuya Kojima
NDNguyen Anh Vu Doan
Nguyen Anh Vu Doan
HAHideharu Amano
Hideharu Amano
Coarse-grained reconfigurable architectures (CGRAs) are expected to be used for embedded systems, Internet of Things (IoT) devices, and edge computing thanks to their high-energy efficiency and programmability. In essence, a CGRA is an array of numerous processing elements. To exploit this abundant computation resource, a compiler for CGRAs has to fulfill more tasks compared that for general-purpose processors. Therefore, many studies have proposed optimization methods, especially for application mapping, because the performance and energy efficiency strongly depend on optimization at compile time. However, many works focus only on performance improvement or resource minimization, although such optimization objectives are not always appropriate when considering various use cases. In this work, we propose GenMap, an application mapping framework using multiobjective optimization based on a genetic algorithm so that users can set optimization criteria as needed. Besides, it provides aggressive power optimization using our dynamic power model and leakage minimization technique. The proposed method is applied to three fabricated CGRA chips for evaluation. Experimental results show that GenMap achieves 15.7% reduction of wire length while keeping processing element utilization when compared with conventional methods. In addition, according to real chip experiments, 12.1%-46.8% of energy consumption is reduced, and up to 2x speedup is archived for several architectures when compared with other two approaches.

22 July 2020 in International Journal of Sustainable Development & World Ecology
Verified
Journal Article
Closed access
HHHe Huang
He Huang
YSYves De Smet
Yves De Smet
CMCathy Macharis
Cathy Macharis
NDNguyen Anh Vu Doan
Nguyen Anh Vu Doan
Sustainability is a key word in modern transportation and logistics. It requires not only economic development but also environmental and social actions. The involvement of multiple stakeholders can express different perspectives and interests to achieve the balance between these three pillars. The multi-actor multi-criteria analysis (MAMCA) is a methodology that can include multiple stakeholders in the process of decision-making. It is important in the field of transport and logistic project appraisal, as many projects fail to be implemented because of a lack of support from one or more stakeholders. In MAMCA, multiple stakeholders can use different criteria trees and express their own preferences. At the end of the analysis, the advantages and disadvantages of each of the proposed scenarios are highlighted. Possible consensuses are then being discussed. However, this last step often turns out to be a difficult task. The purpose of this paper is to propose a way to help the facilitator to identify this (these) consensus(es). This will be based on the use of a weight sensitivity analysis model that was recently developed in the context of the PROMETHEE methods and which is based on inverse mixed-integer linear optimization. This approach allows finding the minimum weight modification for each stakeholder in order to improve the position of a given alternative in the individual rankings and, in an ideal case, to the first position of all the rankings simultaneously. This approach is illustrated on two real MAMCA logistic project cases to seek sustainable mobility solutions.

1 November 2020 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verified
Journal Article
Closed access
MSMark Sagi
Mark Sagi
NDNguyen Anh Vu Doan
Nguyen Anh Vu Doan
MRMartin Rapp
Martin Rapp
TWThomas Wild
Thomas Wild
JHJorg Henkel
Jorg Henkel
AHAndreas Herkersdorf
Andreas Herkersdorf

22 December 2021 in IEEE Transactions on Emerging Topics in Computing
Verified
Journal Article
Closed access
KDKhanh N. Dang
Khanh N. Dang
NDNguyen Anh Vu Doan
Nguyen Anh Vu Doan
AAAbderazek Ben Abdallah
Abderazek Ben Abdallah
While conventional hardware neuromorphic systems usually consist of multiple clusters of neurons that communicate via an interconnect infrastructure, scaling up them confronts the reliability issue when faults in the neuron circuits and synaptic weight memories can cause faulty outputs. This work presents a method named \textit{MigSpike} that allows placing spare neurons for repairing with the support of enhanced migrating methods and the built-in hardware architecture for migrating neurons between nodes (clusters of neurons). \textit{MigSpike} architecture supports migrating the unmapped neurons from their nodes to suitable ones within the system by creating chains of migrations. Furthermore, a max-flow min-cut adaptation and a genetic algorithm approach are presented in order to solve the aforementioned problem. The evaluation results show that the proposed methods support recovery up to 100\% of spare neurons. While the max-flow min-cut adaption can execute in order of milliseconds, the genetic algorithm can help reduce the migration cost with a graceful degradation on communication cost. With the system of 256 neurons per node and a 20\% fault rate, our approach reduces the migration cost from remapping by 10.19 $\times$ and 96.13 $\times$ under Networks-on-Chip of $4\times4$ (smallest) and $16\times 16 \times 16$ (largest), respectively. The Mean-Time-to-Failure evaluation also shows an approximate 10 $\times$ of lifetime expectancy by having a 20\% spare rate.

19 December 2023 in IEEE Access
Verified
Journal Article
Open access
KDKhanh N. Dang
Khanh N. Dang
NDNguyen Anh Vu Doan
Nguyen Anh Vu Doan
NNNgo-Doanh Nguyen
Ngo-Doanh Nguyen
AAAbderazek Ben Abdallah
Abderazek Ben Abdallah
While task mapping for multi-core systems is known as an NP-hard problem, mapping for neuromorphic systems even scale it up due to a high number of neurons per core and a high number of core per system. Moreover, mapping for neuromorphic systems also has several challenges such as heterogeneous computing core or communication fabrics, and potential defects in neurons or routing units. Therefore, this paper presents a genetic algorithm framework named HeterGenMap which is a Genetic Algorithm framework for mapping multiple-layer Spiking Neural Network systems to solve the aforementioned problems. The results show that HeterGenMap improves the overall communication cost by 11.04-26.77% in comparison to the linear mapping. Moreover, under link faulty scenarios, neuron defects, or multi-chip designs, HeterGenMap can reduce the communication cost by 3.41-31.34%, 7.01%-41.51%, and 34.21-45.56% in comparison to the linear approach, respectively. The validation in hardware also demonstrated that HeterGenMap reduces the inference time by 63.10-77.87% from the linear mapping.