This work presents a comparative analysis among four power MOSFET technologies: conventional Silicon (Si), Superjunction (SJ), Silicon Carbide (SiC) and Gallium Nitride (GaN), indicating the voltage, current and frequency ranges of the best performance for each technology. For this, a database with 91 power MOSFETs from different manufacturers was built. MOSFET losses are related to individual characteristics of the technology: drain-source on-state resistance, input capacitance, Miller capacitance and internal gate resistance. The total losses are evaluated considering a drain-source voltage of 400 V, power levels from 1 kW to 16 kW (1 A–40 A) and frequencies from 1 kHz to 500 kHz. A methodology for selecting power MOSFETs in power electronics applications is also presented.

A design methodology for minimum volume of LCL filters applied to grid connected converters is proposed. It combines the determination of filter parameter values (inductances and capacitances) to hardware design (component technology and inductor construction). Using the proposed strategy, different combinations of L-C-L that meet standard restrictions are determined. The influence of the harmonic content that results from filter design is considered in order to estimate component losses, and filter and bus capacitor lifetimes. Results are presented for filters that lead to the smallest volume, highest capacitor lifetime, or a compromise between both. A case study with three different magnetic material technologies and two types of capacitors is done. The design methodology is experimentally validated for a 1 kW converter. Step-by-step procedures for the determination of filter parameters and inductor hardware design are provided.

This work presents a design for uninterruptible power supply inverters using Pareto front optimization for improved cost and efficiency. Three PWM modulation techniques applied to the full-bridge inverter are analyzed. As a result, the best MOSFET design solution in terms of the cost and efficiency of the inverter is evaluated based on a database with 47 power MOSFETs. Using the Pareto front, the optimal and sub-optimal solutions are compared, considering the three modulation techniques and the characteristics of MOSFETs manufactured for different voltage levels. Thermal and electrical measurements are used to validate the models.

This paper presents a comparative analysis of electrical losses and subsequent thermal limits of the inverter of UPSs for small office and home office (SOHO) applications. For this, three PWM modulation techniques applied to the full-bridge converter are considered, with power levels of 100–1000 W and switching frequencies of 30–120 kHz. To validate the electrical and thermal models, a dSapce MicroLabBox equipment was used to implement modulation techniques on a commercial 1000 W UPS, and a Keysight DAQ970A data logger was used for temperature measurements. As a result, the MOSFET temperatures and losses are obtained for the three modulation techniques evaluated, indicating the best scenario for use and its influence on the UPS autonomy time.