Press-pack insulated-gate bipolar transistor (PP-IGBT) device is used in high-power modular multilevel converter high-voltage direct current (MMC-HVDC) system due to the advantages of high reliability and short-circuit failure. Considering safeties and stable operations, it is necessary to model and analyze the fatigue failure evolution of PP-IGBT device that improves the reliability of MMC-HVDC system. This paper proposes a method to analyze from fretting wear failure to short-circuit failure in PP-IGBT device. First, a multiphysics coupling model of a single-chip 3.3-kV/50-A PP-IGBT device is presented to analyze the fretting wear failure, and the weak layer and the fatigue effect are obtained by power cycling simulation. Second, considering the Al-Si diffusion reaction mechanism on the interface of IGBT chip, the short-circuit failure is investigated by the finite-element method model of PP-IGBT device with Al-Si osmotic hole, and the changing trend of characteristic parameters is estimated during short-circuit failure process. Finally, the steady state, power cycling, and short-circuit tests are used to verify the multiphysics coupling model, fretting wear failure, and short-circuit failure. The experiment indicates that the fatigue failure evolution of PP-IGBT device occurs from fretting wear failure to short-circuit failure, and it suggests that the proposed method can be applied to optimize design and condition monitoring of PP-IGBT device.

The transient overvoltage and oscillation phenomena, which are caused by its high switching speed in a solid-state DC circuit breaker based on the silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET), are a crucial problem. This paper presents a simple and reliable method to manage such problem. An equivalent circuit model for SiC MOSFET is primarily established. The influence of stray inductance in energy absorption loop on the turn-off characteristics of the DC circuit breaker is then analyzed. Subsequently, possible typical overvoltage suppression methods, such as using a resistor–capacitor snubber circuit and increasing gate resistance and parallel capacitance between the gate and source, are simulated and analyzed. Thereafter, a peak voltage suppression method that does not sacrifice the fast switching capability of SiC MOSFET is proposed based on the different amounts of energy absorbed by metal oxide varistors (MOVs) with varying voltage levels. A basic principle for selecting a snubber MOV is proposed based on the voltage ratio of a snubber and an energy-absorbing MOV. Finally, the feasibility of the proposed method is verified via a small-scale principle prototype.

Crosstalk in a phase-leg configuration significantly limit the high switching speed performance of silicon carbide (SiC) MOSFET due to their lower threshold voltage and higher allowable negative gate voltage as compared with traditional silicon (Si). To fulfill the potential fast switching speed quality of SiC MOSFET, an assist gate driver (AGD) circuit for crosstalk suppression based on negative-biased turn-off voltage was proposed, which contains an auxiliary capacitor and two passive transistors without additional control signals. First, a recommended gate driver by several SiC device manufacturers was introduced to analyze the mechanism of crosstalk. Then, the operation principle of the proposed AGD circuit was elaborated, and the parameter design criteria of the main elements were given. Finally, a simulation using LTspice and an experiment based on Wolfspeed 1200V SiC MOSFET tests were used to verify the effectiveness of the proposed gate driver. Simulation and experimental results show that the AGD circuit has a superior characteristic of crosstalk suppression under varying operating conditions. Thus, the proposed circuit could meet the fastidious requirement of fast-speed SiC MOSFET under high DC voltage condition with less complexity.

Press pack packaging technology has been widely used in insulated gate bipolar transistors for highvoltage and high-power density applications. The effects of unbalanced internal pressure, which occurs frequently within large-scale press-pack modules, remain unclear, and thermal parameters within modules cannot be directly measured due to the pressure-type package structure. Current and temperature distribution within 3300 V/1500 A modules are investigated to determine module reliability characteristics and derive future lifetime models using multi-physics models. Unbalanced clamping force causes extremely uneven temperature stress and electrical stress in spatial distribution. It indicates that partial chips must withstand high stresses that cause the initial fatigue of largescale press-pack modules. Junction temperature difference reaches up to 53.6 °C among chips at chip surface roughness of 1.27 μm. This condition shows that aging of modules will accelerate at the onset of partial chips degradation. Finite element modeling and equivalent test are utilized to verify the multi-physics model by using single-chip devices in parallel.

Thermal contact resistances usually account for more than 50% of the total thermal resistance in a press-pack insulated-gate bipolar transistor (PP-IGBT) device, which affect the heat dissipation of the PP-IGBT device and lead to a high junction temperature. In this article, a method for optimizing the thermal contact resistances of the PP-IGBT device is proposed by filling the liquid metal thermal interface materials in the contact surface. Bismuth-based liquid metal with high thermal conductivity and electrical conductivity is chosen, and the material is used for filling between the insulated-gate bipolar transistor chip and the molybdenum layers. The thermal characteristics are compared with the traditional commercial PP-IGBT device using finite-element simulation and experimental methods. The high-voltage insulation reliability of the proposed optimized method is verified by blocking voltage test, and the long-term reliability of the device is verified by a power cycling test. The results show that the junction-to-case thermal resistance of the optimized PP-IGBT device can be reduced by more than 30%, which is helpful for improving the thermal reliability of large-capacity PP-IGBT devices.