I’m an Assistant Professor of Reconfigurable Computer Architectures in the Embedded Architectures & Systems Group at the Institute of Technical Informatics, Graz University of Technology. I completed my PhD under Prof. Marcel Baunach, earning the Doctor of Engineering Sciences (Dr. techn.) degree sub auspiciis Praesidentis. My research focuses on sustainable, flexible, and runtime-reconfigurable microcontroller architectures for embedded systems—especially FPGA-based RISC-V—at the hardware–software interface, including processor logic and embedded operating systems. I teach CPU architecture and implementation, embedded programming, and scientific writing. I have authored peer-reviewed publications in international journals and conference proceedings and am active in several RISC-V SIGs, Euromicro, the ACM, and the German Informatics Society (GI).