This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator.

Resistive memories are promising candidates for replacing current nonvolatile memories and realize storage class memories. Moreover, they have memristive properties, with many discrete resistance levels and implement artificial synapses. The last years researchers have demonstrated RRAM chips used as accelerators in computing, following the new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM structures. Understanding of the switching mechanism is very critical for the modeling and the use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes respectively. Next, we dope nitride with oxygen in order to introduce and modify the intrinsic nitride defects. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and by setting the appropriate current compliance, the operation condition of the RRAM cells can be tuned. Furthermore, resistance change can be obtained using appropriate SET/RESET pulsing sequences allowing the use of the devices in computing acceleration application. Impedance spectroscopy measurements clarify the presence of different mechanisms during SET and RESET. We prove through a customized measurement set-up and the appropriate control software that the initial charge-storage in the intrinsic nitride traps governs the resistance change.

State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiN_x) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.

The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum's protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants.

Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N2, where N is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant.