Since the temperature of a photovoltaic (PV) module is not consistent as it was estimated at a standard test condition, the thermal stability of the solar cell parameters determines the temperature dependence of the PV module. Fill factor loss analysis of crystalline silicon solar cell is one of the most efficient methods to diagnose the dominant problem, accurately. In this study, the fill factor analysis method and the double-diode model of a solar cell was applied to analyze the effect of J₀₁, J₀₂, R_s, and R_sh on the fill factor in details. The temperature dependence of the parameters was compared through the passivated emitter rear cell (PERC) of the industrial scale solar cells. As a result of analysis, PERC cells showed different temperature dependence for the fill factor loss of the J₀₁ and J₀₂ as temperatures rose. In addition, we confirmed that fill factor loss from the J₀₁ and J₀₂ at elevated temperature depends on the initial state of the solar cells. The verification of the fill factor loss analysis was conducted by comparing to the fitting results of the injection dependent-carrier lifetime.

A thin silicon oxide (SiO_x) layer (thickness: 1.5–2.0 nm) formed at an Al₂O₃/Si interface can enhance the interface properties. However, it is challenging to control the characteristics of thin SiO_x layers because SiO_x forms naturally during Al₂O₃ deposition on Si substrates. In this study, a ~1.5 nm-thick SiO_x layer was inserted between Al₂O₃ and Si substrates by wet chemical oxidation to improve the passivation properties. The acidic solutions used for wet chemical oxidation were HCl:H₂O₂:H₂O, H₂SO₄:H₂O₂:H₂O, and HNO₃. The thicknesses of SiO_x layers formed in the acidic solutions were ~1.48, ~1.32, and ~1.50 nm for SiO_x-HCl, SiO_x-H2SO4, and SiO_x-HNO3, respectively. The leakage current characteristics of SiO_x-HNO3 were better than those of the oxide layers formed in the other acidic solutions. After depositing a ~10 nm-thick Al₂O₃ on an SiO_x-acidic/Si structure, we measured the effective carrier lifetime using quasi steady-state photoconductance and examined the interfacial properties of Al₂O₃/SiO_x-acidic/Si using surface carrier lifetime simulation and capacitance–voltage measurement. The effective carrier lifetime of Al₂O₃/SiO_x-HNO3/Si was relatively high (~400 μs), resulting from the low surface defect density (2.35–2.88 × 10¹⁰ cm⁻²eV⁻¹). The oxide layer inserted between Al₂O₃ and Si substrates by wet chemical oxidation helped improve the Al₂O₃/Si interface properties.

In a multicrystalline silicon (mc-Si) wafer, trapping effects frequently occur in the carrier lifetime measurement based on the quasi-steady-state photoconductance (QSSPC) technique. This affects the accurate measurement of the carrier lifetime of an mc-Si solar cell by causing distortions at a low injection level close to the P_max point. Therefore, it is necessary to understand this effect and effectively minimize the trapping-center density. In this study, the variations in the minority carrier-trapping effect of hydrogen at different annealing temperatures in an mc-Si were observed using QSSPC, time-of-flight secondary ion mass spectroscopy, and atom probe tomography. A trapping effect was confirmed and occurred in the grain boundary area, and the effect was reduced by hydrogen. Thus, in an mc-Si wafer, effective hydrogen passivation on the grain area and grain boundary is crucial and was experimentally proven to minimize the distortion of the carrier lifetime.

The etching of Si wafers significantly influences the efficiency of photovoltaic devices. Texturing can effectively decrease front surface reflection and improve device performance. Saw damage removal (SDR) is necessary to yields uniform random pyramidal surfaces without the appearance of saw marks, it entails significant consumption of chemical solutions and complicated cleaning steps. Herein, an alternative process of pre-texturing thermal treatment was carried out at 800 °C for 10 min, followed by anisotropic texturing, and a uniform pyramidal surface over a large area of the textured surface was obtained without saw marks. Compared with that of as-cut mono-Si wafers (30.7%), the weighted average reflectance of the samples textured with or without thermal treatment decreased to 11.2% and 11.9%, respectively, and further to 3% and 3.4%, respectively, when anti-reflection coatings were applied. In addition, saw marks on the wafer surface were used as gettering sites during thermal treatment, and the bulk lifetime was more than doubled from 42.6 µs before the treatment to 93.8 µs after. The simple, SDR-free method presented herein for enhancing the textural uniformity of Si wafers and, hence, solar cell performance, can be employed on an industrial scale without necessitating additional investment in equipment.

The introduction of diamond wire sawing (DWS) technology has resulted in significant cost reduction in the fabrication of crystalline silicon wafers. However, the DWS process results in parallel wheel marks, saw damage, and formation of an amorphous silicon layer on the surface, which causes difficultly in effectively forming the desired surface texture using conventional acidic etching (also known isotropic etching) techniques for multicrystalline silicon (mc-Si) wafers. In this study, we propose a novel pretreatment grinding (NPTG) technique as a method to address such issues. This is a relatively simple and inexpensive method that does not utilize processes that require the use of expensive equipment, such as vacuum equipment. Additionally, it makes use of environment-friendly procedures that do not require materials such as metal catalysts and additives that cause environmental pollution. The proposed NPTG method provides a good surface topology for effective texturing using a conventional acidic etching solution, and as a result, a uniform texture can be applied to DWS mc-Si wafers. Under the optimized experimental conditions in this study, a weighted average reflectance of 22.63% was achieved after the NPTG was applied. This reflected 6.67% less light than the 29.3% after conventional acidic texturing without the NPTG using DWS mc-Si wafers. Further, a solar cell fabricated using the DWS mc-Si wafers treated with the NPTG method achieved a cell efficiency of approximately 19.2%.