Background: All body systems involved in ensuring a healthy posture (musculoskeletal system, oculomotor, oto-vestibular and occluso-cranial-mandibular) are essential in maintaining postural balance. Research Question: Does experimental malocclusion in subjects in static position determine variations in plantar pressure? Methods: Overall, 31 subjects were included in the study. The plantar pressure was evaluated in five different points: lateral and medial heel, midfoot, 1st and 5th metatarsal area. Using a specially designed splint, an artificial malocclusion was induced on the right hemimandibular arch. The pressure was measured at 0 (T0), 15 (T1) and 30 min (T2) after splint application. Results: The right external plantar sensors recorded statistically significant differences in pressure values after 15 min of splint wear (5th metatarsal area, p = 0.05; midfoot, p = 0.04). Important pressure values were also recorded by the left internal plantar sensors (1st metatarsal, p = 0.01; medial heel, p = 0.006), after 30 min of splint wear. Conclusions: Asymmetrical experimental malocclusion produces early changes in plantar pressure, a proof of compensatory mechanisms induced by secondary postural imbalance.

This article wants to reveal a new method to measure and moderate a vibrating wire transducer. Combining a complex measuring procedure that includes data acquisition and a MatLab application, it is possible to calculate the transducer's impedance. Furthermore, using higher frequencies (as the resonance frequency), respectively lower frequencies signals, the technique above evaluates correctly some parameters that where previously unavailable and also calculates the impedance's real and imaginary parts. The above processes are fully automated under MatLAB platform so the transducer's impedance to be efficiently calculated.

The intrinsic noise of giant magnetoresistive (GMR) sensors is large at low frequencies, and their resolution is inevitably significantly limited. Investigation of GMR noise requires the use of measurement systems that have lower noise than the sample. In this context, the main purpose of this study is to evaluate the effectiveness of two electronic noise measurement configurations of a single GMR sensing element. The first method connects the sample in a voltage divider configuration and the second method connects in a Wheatstone bridge configuration. Three amplification set-ups were investigated: a low-noise amplifier, an ultra-low-noise amplifier and an instrumentation amplifier. Using cross-correlation, the noise of the measurement system introduced by the amplifiers was reduced. Noise spectra were recorded at room temperature in the frequency range of 0.5 Hz to 10 kHz, under different sample bias voltages. The measurements were performed in zero applied magnetic field and in a field corresponding to the maximum sensitivity of the sensor. From the noise spectra, the detectivity of the sensor was determined to be in the 200–300 nT/√Hz range. Good agreement was observed between the results obtained using all three set-ups, suggesting the effectiveness of the noise measurement systems applied to the magnetoresistive sensor.

The paper is focused on an experimental design of Fast Fourier Transform core implemented in an FPGA. It is well known that frequency domain analysis is very important in digital signal processing application field and wouldn't be possible without Fourier Transform calculation. The novelty and the experimental part of this study lie into an array of complex multipliers based of DSP48 slices within FPGA resources. These multipliers are able to run simultaneously in order to reduce the processing time of the N points FFT. The goal is to calculate the Fourier coefficients from a discrete input sequence of samples. Depending on the bits flipping, the study will describe both FFT (DIT) Decimation In Time and FFT (DIF) Decimation In Frequency algorithm.

The stack-up for printed circuit boards is one of the most important factors in defining the performance. In this paper, we proposed a stack-up for a mixed-signal system that caters the problem of EMI suppression, noise, signal and power integrity. The stack-up provides two external controlled impedance layers and one buried controlled impedance layer, which may be used to route one of the power supplies rails for the analog circuits. It also has two ground layers and one layer for power supply rails with an excellent interplane capacitance. Besides this, the stack-up offers a minimum loop area and a minimum power plane noise coupling.

Many products currently take advantage of microcontroller and are capable of creating an analogue - to - digital (A/D) converter with very little extra hardware or software. In effort to make the design more competitive, the typical successive approximation A/D converter (ADC), on board, can be replaced by several low - cost A/D PWM converter structure. The designer must first determine the true system requirements and then select an approach that best meets those requirements. Quite often when a discrete ADC is designed, tradeoffs must be made between parameters such as speed versus resolution and high accuracy versus low cost. Besides the actual input signal parameters (rate of change and range) and converter parameters (accuracy and resolution), other tasks that need to be performed by the microcontroller circuit (real -time monitoring /control) often play a major role in witch method is optimum.