Recently, there has been much scholarly research on the applications of CNTs in various fields which can be attributed to their outstanding properties. For that matter, machining processes as the backbone of manufacturing technologies have also benefited greatly from the introduction of CNTs. However, there is a lack of papers that provide a holistic overview on potential applications, which impedes focused and robust research in their application. In this work, after providing an outline of the methods used in increasing the productivity of machining processes, we will review the ways in which CNTs, known for their remarkable mechanical, chemical, electrical, and thermal characteristics, enhance the productivity of machining processes. We emphasize fit-for-purpose applications to determine the fate of CNTs use in machining processes. We examine the applications of CNTs in enhancing the mechanical characteristics of cutting tools, which include increased wear resistance, strength, and thermal conductivity, thereby extending tool life and performance. Additionally, this work highlights the application of nanofluids in MQL systems, where CNTs play a crucial role in reducing friction and enhancing thermal management, leading to reduced lubricant usage while maintaining cooling and lubrication effectiveness.

Microlens arrays have been widely employed to control the reflection, refraction, and diffraction characteristics of light due to its distinctive surface properties. Precision glass molding (PGM) is the primary method for the mass production of microlens arrays, of which pressureless sintered silicon carbide (SSiC) is a typical mold material due to its excellent wear resistance, high thermal conductivity, high-temperature resistance, and low thermal expansion. However, the high hardness of SSiC makes it hard to be machined, especially for optical mold material that requires good surface quality. The lapping efficiency of SSiC molds is quite low. and the underlying mechanism remains insufficiently explored. In this study, an experimental study has been performed on SSiC. A spherical lapping tool and diamond abrasive slurry have been utilized and various parameters have been carried out to achieve fast material removal. The material removal characteristics and damage mechanism have been illustrated in detail. The findings reveal that the material removal mechanism involves a combination of ploughing, shearing, micro-cutting, and micro-fracturing, which aligns well with the results obtained from finite element method (FEM) simulations. This study serves as preliminary reference for the optimization of the precision machining of SSiC PGM molds with high efficiency and good surface quality.

Electrochemical oxidation (ECO) has been used widely to oxidize single crystal Si wafers. Aiming at optimizing the ECO assisted machining methods, the oxidation behaviors of single- crystal silicon (100) wafer under potentiostatic mode are experimentally investigated. It is shown that the Si wafer can be electrochemically oxidized and the oxidized film thickness reaches to 239.6 nanometers in 20 min. The hardness of the oxidized surface is reduced by more than 50 percent of the original surface. The results indicate that the oxide thickness and the hardness can be controlled by changing the voltage. Based on the experimental findings, a hypothesis on the ECO mechanism under potentiostatic mode was proposed to explain the fluctuations of current density under specific applied voltage. The occurrence of the multiple peaks in the current density curve during the oxidation process is due to the formation of discharge channels, which was initiated from the defects at the interface between the oxide bottom and the substrate. This breaks the electrical isolation and leads to the discontinuous growth of the electrochemical oxide layer. The present work contributes to the fundamental understanding of the ECO behaviors for the single-crystal Si (100) wafer under potentiostatic mode.

Despite the importance of physical understanding of interfacial thermal conductance (G) for metal/graphene (Gr)/dielectric interfaces, there exists a large discrepancy regarding the role of dielectric substrates in thermal transport across graphene interfaces in previous studies. In this work, we experimentally investigate the impact of dielectric substrates on thermal transport across metal/Gr/dielectric interfaces through accurately measuring G for various Al/Gr/dielectric interfaces over a temperature range of 80–300 K, using both standard time-domain thermoreflectance (TDTR) and differential TDTR. We find that G of Al/Gr/dielectric falls within the range of 29–36 MW m−2 K−1 at room temperature and displays notably weak substrate dependence even with the dielectric Debye temperature ranging from 500 to 1050 K. This substrate independence is attributed to the dominant role of phonon transmission at metal/Gr interfaces in thermal transport across metal/Gr/dielectric interfaces, and the insignificant impacts of phonon density of states overlap on G for Gr/dielectric interfaces. Moreover, through the comparison of our measured G for both Gr/crystalline-Al2O3 and Gr/amorphous-Al2O3, we demonstrate that contrary to previous predictions, the crystalline and amorphous forms of dielectrics do not play a substantial role in thermal transport across graphene interfaces. Our work fills the gap in experimental data on G for metal/Gr/dielectric interfaces and provides valuable insights into physical understanding of thermal transport mechanisms across such interfaces.