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José Ricardo Gómez-Rodríguez obtuvo los grados de Ingeniero en Sistemas Computacionales por el Instituto Tecnológico de Zacatecas en el 2002, Maestría en Tecnologías de la Información por la Universidad Interamericana para el Desarrollo en el 2015. Actualmente es profesor investigador en la Universidad Autónoma de Zacatecas.
Current computing platforms encourage the integration of thousands of processing cores, and their interconnections, into a single chip. Mobile smartphones, IoT, embedded devices, desktops, and data centers use Many-Core Systems-on-Chip (SoCs) to exploit their compute power and parallelism to meet the dynamic workload requirements. Networks-on-Chip (NoCs) lead to scalable connectivity for diverse applications with distinct traffic patterns and data dependencies. However, when the system executes various applications in traditional NoCs—optimized and fixed at synthesis time—the interconnection nonconformity with the different applications’ requirements generates limitations in the performance. In the literature, NoC designs embraced the Software-Defined Networking (SDN) strategy to evolve into an adaptable interconnection solution for future chips. However, the works surveyed implement a partial Software-Defined Network-on-Chip (SDNoC) approach, leaving aside the SDN layered architecture that brings interoperability in conventional networking. This paper explores the SDNoC literature and classifies it regarding the desired SDN features that each work presents. Then, we described the challenges and opportunities detected from the literature survey. Moreover, we explain the motivation for an SDNoC approach, and we expose both SDN and SDNoC concepts and architectures. We observe that works in the literature employed an uncomplete layered SDNoC approach. This fact creates various fertile areas in the SDNoC architecture where researchers may contribute to Many-Core SoCs designs.
Jose Gomez-Rodriguez; Remberto Sandoval-Arechiga; Salvador Ibarra-Delgado; Viktor Rodriguez-Abdala; Jose Vazquez-Avila; Ramon Parra-Michel. A Survey of Software-Defined Networks-on-Chip: Motivations, Challenges and Opportunities. Micromachines 2021, 12, 183 .
AMA StyleJose Gomez-Rodriguez, Remberto Sandoval-Arechiga, Salvador Ibarra-Delgado, Viktor Rodriguez-Abdala, Jose Vazquez-Avila, Ramon Parra-Michel. A Survey of Software-Defined Networks-on-Chip: Motivations, Challenges and Opportunities. Micromachines. 2021; 12 (2):183.
Chicago/Turabian StyleJose Gomez-Rodriguez; Remberto Sandoval-Arechiga; Salvador Ibarra-Delgado; Viktor Rodriguez-Abdala; Jose Vazquez-Avila; Ramon Parra-Michel. 2021. "A Survey of Software-Defined Networks-on-Chip: Motivations, Challenges and Opportunities." Micromachines 12, no. 2: 183.
Current System-on-Chips (SoCs) execute applications with task dependency that compete for shared resources such as buses, memories, and accelerators. In such a structure, the arbitration policy becomes a critical part of the system to guarantee access and bandwidth suitable for the competing applications. Some strategies proposed in the literature to cope with these issues are Round-Robin, Weighted Round-Robin, Lottery, Time Division Access Multiplexing (TDMA), and combinations. However, a fine-grained bandwidth control arbitration policy is missing from the literature. We propose an innovative arbitration policy based on opportunistic access and a supervised utilization of the bus in terms of transmitted flits (transmission units) that settle the access and fine-grained control. In our proposal, every competing element has a budget. Opportunistic access grants the bus to request even if the component has spent all its flits. Supervised debt accounts a record for every transmitted flit when it has no flits to spend. Our proposal applies to interconnection systems such as buses, switches, and routers. The presented approach achieves deadlock-free behavior even with task dependency applications in the scenarios analyzed through cycle-accurate simulation models. The synergy between opportunistic and supervised debt techniques outperforms Lottery, TDMA, and Weighted Round-Robin in terms of bandwidth control in the experimental studies performed.
Salvador Ibarra-Delgado; Remberto Sandoval-Arechiga; José Ricardo Gómez-Rodríguez; Manuel Ortíz-López; María Brox. A Bandwidth Control Arbitration for SoC Interconnections Performing Applications With Task Dependencies. Micromachines 2020, 11, 1063 .
AMA StyleSalvador Ibarra-Delgado, Remberto Sandoval-Arechiga, José Ricardo Gómez-Rodríguez, Manuel Ortíz-López, María Brox. A Bandwidth Control Arbitration for SoC Interconnections Performing Applications With Task Dependencies. Micromachines. 2020; 11 (12):1063.
Chicago/Turabian StyleSalvador Ibarra-Delgado; Remberto Sandoval-Arechiga; José Ricardo Gómez-Rodríguez; Manuel Ortíz-López; María Brox. 2020. "A Bandwidth Control Arbitration for SoC Interconnections Performing Applications With Task Dependencies." Micromachines 11, no. 12: 1063.