Wireless power and data communication systems in implantable medical devices (IMDs) are developed to control and report acquired biological data from an implanted device to an external stage in several medical applications. Ultrasonic, capacitive, optical, radio frequency (RF), and inductive links are employed as a wireless power and data transmission technique. Inductive power transfer (IPT) is one of the most commonly used techniques due to its robustness, simplicity, safety, and capability of simultaneous and bidirectional data and power transmission. This paper presents a systematic review and survey of the latest inductive power and data transmission methods for IMDs. The fundamental principles of remote powering through inductive links, the critical parameters of design, and power transfer efficiency calculations are presented. Single and multiple inductive links, the advantages and drawbacks, optimization methods, and comparison by their performances are explored. In addition, modulation schemes, along with improvement techniques reported in the literature, the strengths and limitations, and the measured or the simulated data rate of each are also reviewed. A benchmarking table with summarized design features of systems, essential parameters for wireless powering and data communication, and categorized Figure-of-Merits (FoMs) to compare performances are also provided.

A wirelessly powered and data communication system is presented which is implemented as a full system, designed for multisite implanted biomedical applications. The system is capable of receiving wireless power and data communication for each implant separately, using inductive links with different resonance frequencies. To achieve this, dual-band coils are presented in the system. In addition, the system provides bi-directional data communication, utilizing amplitude and load shift keying (ASK and LSK) modulation schemes over a single inductive link. The system employs a digitally assisted active rectifier and an automatic resonance tuning system, to improve the power transfer efficiency (PTE) through various coupling coefficients, while minimizing the reverse current and power dissipation. The power control unit enables closed-loop monitoring to prevent high or low power delivery, and it can detect inefficient or excessive wireless power transmission or prevent temperature elevation by limiting the voltage to a safe level. A separated-V _b ASK demodulator is presented in the paper which is utilized within the data conversion chain, serving both the external and implanted units. The whole system is fabricated using a standard 180-nm 1.8/3.3 V CMOS process with a core area of 0.82 mm ² . The system is tested with coupled multisite inductive links and offers the maximum overall PTE of 31.2%, from the Tx coil to the implant load.

A new structure of low-power demodulator named “separated-Vb” amplitude shift keying (ASK) demodulator is proposed. The circuit is based on the switching behavior of the core digital shaper with different bias voltages, which improves its operation at low modulation indexes and reduces power consumption. This design does not require a comparator or Schmitt trigger, and only a few elements are needed which minimizes the chip area. The design is fabricated in the 0.18 μm CMOS process. The core chip area is 0.00144mm2, and the power consumption is 45 μW at a 1.8V power supply. The data rate can be nearly 2.7 Megabits per second (Mbps) at 13.56 MHz.

This paper presents a wireless power conversion system designed for biomedical implants, with integrated automatic resonance tuning. The automatic tuning mechanism improves power transfer efficiency (PTE) by finely tuning the resonant frequency of the power link and maximizing the rectified voltage. This adjustment ensures robust and reliable remote powering, even in the face of environmental changes and process variations, while also minimizing tissue exposure to power. On-chip switched array capacitors are connected in parallel with the resonant capacitor, and the system identifies the optimal switched capacitor combination for the highest rectified voltage by iterating over each of them. The proposed system is implemented and fabricated in standard 180 nm CMOS technology, with a total area of 0.339mm2, and its operation is verified. The measurement results demonstrate that this system provides tolerance up to mismatches equivalent to 75 pF capacitance variation in LC tank, ±15% LC variation in this design. The system offers a PTE enhancement from 9.1% to 30.2% in case of high LC variation, and the tuning control consumes 154.7 μW of power during resonance tuning. Moreover, the power conversion chain delivers an optimized rectified voltage along with a regulated voltage of 1.8 V.

Effective power management is crucial in designing wirelessly powered implants that have a long operational lifetime. It ensures that the received power is optimized for efficient operation and prevents damage caused by excessive or insufficient powering. This paper presents a power feedback control unit for wirelessly powered implanted biomedical devices, which includes an implanted voltage level detector and limiter. The feedback control bits can be transmitted through the link to the external unit as uplink data communication, or used to autonomously prevent overvoltage in worst-case scenarios. This design is implemented and fabricated in a 180nm CMOS process, which can be used for the power conversion chain of wirelessly powered biomedical implanted devices. The system consumes 144 μW at a supply voltage of 1.8V and a chip area of 0.02255mm2.

This letter presents the design of a 13.56 MHz offset‐enhanced full‐wave active rectifier, tailored for wirelessly powered biomedical implants. The design incorporates digitally assisted, delay‐compensated active diodes and symmetrical bulk biasing in the rectifier core to enhance conduction time, thus improving the voltage conversion ratio (VCR) and power conversion efficiency (PCE). A delay improvement is achieved both in no‐load and high‐load conditions through an additional comparison path with an offset voltage that is higher than zero. The proposed rectifier is implemented and fabricated in a 180 nm CMOS technology with an area of 0.024 . The rectifier, tested and measured with inductive links, offers a maximum VCR of 96.4% and a maximum PCE of 89%.