In this work we present the design and fabrication in metallic 3D-printing of a compact conformal slotted waveguide antenna array operating in the Ku-band. The application objective, although not limited only to this, is the optimisation of an antenna element which by stacking will be able to form a quasi-cylindrical sector. A beamforming network will be used for beam-steering in the elevation plane as coverage in the azimuthal plane is guaranteed by the conformal geometry. The compact design of the antenna element is therefore of great significance. For this reason, a direct feeding scheme by a coaxial connector is adopted. The antenna has been optimized following multiple parametric analyses of its geometrical parameters for the enhancement of the bandwidth, return losses and realized gain. The antenna was fabricated with Selective Laser Melting in aluminium and the experimental results agree well with the numerically calculated ones. The proposed CSWAA exhibits a reflection coefficient below -10 dB, realized gain above 14 dBi, as well as good cross-polarization and side-lobe level over a relative bandwidth of 8%.

This letter addresses a discrete tunable resonator with three different states controlled by a single dc source. The passive components are designed together with the active elements, and both are integrated into a silicon substrate. This method of codesign offers great flexibility in doped area sizing and positioning, allowing for easy management of novel three-state resonators based on two different doped areas (or two different surfaces of semiconductor junctions). The largest area switches from the reverse state (OFF state) to the forward state (ON1 state), with a lower bias voltage than that of the smallest area (ON2 state). This concept offers some new degrees of freedom in the design of tunable microwave devices, showcased in this letter by a demonstrator that can operate at three different resonant frequencies. Good agreement was obtained between simulations and measurements in the three states. Insertion losses are lower than 1.6 dB and the same for the different states.

This paper deals with a novel approach to co-design a microstrip line associated with a distributed PIN switch in a semiconductor substrate. An High-Resistivity Silicon (HR-Si) substrate was chosen to optimize the trade-off between semiconductor effects and microwave propagation. Indeed, thanks to this particular substrate, the novel co-design concept is illustrated by an integrated and distributed switch based on an N ⁺ PP ⁺ junction. This concept offers great flexibility in the design of tunable microwave devices. Moreover, applied to tunable distributed systems (antennas, filters, etc) in planar technology, it makes it possible to avoid the need for reported components or metalized holes. The coupling between semiconductors and microwave devices is taken into account thanks to a new co-design flow. Two demonstrators, with switchable doped microstrip lines, are manufactured and measured to validate the approach. The performances achieved in terms of insertion losses (IL) and isolation (Iso) were lower than 2.8 dB and higher than 40 dB, respectively, over the whole frequency band under consideration (from DC to 20 GHz).

Wireless Networks-on-Chip (WiNoC) are being explored for parallel applications to improve the performances by reducing the long distance/critical path communications. However, WiNoC still require precise propagation models to go beyond proof of concept and to demonstrate it can be considered as a realistic efficient alternative to wired NoC. In this paper, we present accurate 3D models based on measurements in Ka band and Electromagnetic (EM) simulations of transmission on silicon substrate in the V band and the Sub-THz band. Using these EM results, a time-domain simulation is performed using an On-Off Keying (OOK) modulation based transmission with different PA/LNA configurations. Our results highlight the type of performances and tradeoffs to be considered according to different parameters such as power output and amplifier's gain. By improving the knowledge about the signal propagation, one can conduct precise design space exploration for parallel applications. We discuss the realistic channel modeling and we present also hybrid solutions and associated limitations of WiNoC architectures. We conclude the paper with research directions to be explored to make WiNoC a reality.

This paper presents an implementation of the transmission channel for tireless interconnect Network-on-Chip (WiNoC) applications in the context of BBC (on-chip wireless Broadcast-Based parallel Computing) project. First, the advantages of the WiNoC for intra-chip communications and particularly our application are presented. Then, the intra-chip transmission is discussed and analyzed using integrated dipole antennas in Ka band (26-40 GHz). The simulations are compared to the measurements on two manufactured demonstrators. They show a good agreement and validate the problems encountered due to the Silicon substrate and its environment. Finally, we propose perspective solutions in order to improve the intra-chip transmission on integrated circuits.

This article presents the implementation of the intrachip propagation channel in the case of a wireless interconnect network-on-chip used for parallel computing applications. These wireless interconnects still require precise propagation models to demonstrate that they can be considered as a realistic efficient alternative to the wired interconnects. First, we show the advantages of wireless solutions for broadcast applications. As this type of circuit will be realized using silicon as the main component, we present in the literature review the problems and constraints of integrated antennas and channels on silicon. Then, a deep electromagnetic study for the intrachip transmission is conducted, with measurements done using two manufactured prototypes of printed dipole antennas on silicon in the Ka-band (26-40 GHz) and in the V-band (40-75 GHz) with different scenarios. The good agreement between simulations and measurements validates the problems encountered due to the silicon substrate and its environment. Finally, we propose perspective solutions in order to improve the intrachip transmission on integrated circuits and to prove the feasibility of the wireless network on chip using integrated antennas.