Standard dynamic characterization methods based on periodic narrow-pulse low duty-cycle excitation waveforms provide suboptimal I/V curves when used along with GaN field effect transistors (FETs), due to complex nonlinear charge trapping effects. Thus, a double-pulse technique for the dynamic characterization of GaN FETs is here presented. The double-pulsed I/V characteristics are shown to be not only isothermal but also corresponding to a fixed charge trapping state.

A Ka-band monolithic low-noise amplifier (LNA) with high gain and high dynamic range (DR) has been designed and implemented in a 100-nm gallium nitride (GaN)-on-Si technology. The LNA is designed as the first stage of a high DR receiver in an frequency modulated continuous wave (FMCW) radar for the detection of small drones. The three-stage monolithic microwave integrated circuit (MMIC) LNA has a linear gain of 26 dB and a noise figure (NF) of 2 dB in the frequency band 33-38 GHz. The output 1-dB compression point (P1dB) and output IP3 at 37 GHz are 20 and 28.4 dBm, respectively. To our knowledge, this combination of NF, gain, and DR performance represents the state of art in this frequency band.

A scalable approach to the modeling of millimeter- wave field-effect transistors is presented in this paper. This is based on the definition of a lumped extrinsic parasitic network, easily scalable with both the number of fingers and the finger widths. The identification of the extrinsic network parameters is carried out by means of accurate full-wave electromagnetic simulations based on the layout of a single reference device. In the paper, the parasitic effects of the gate/drain manifolds and of the source layout are investigated, leading to the definition of realistic linear scaling rules. The obtained model is experimentally validated by using a family of 0.25-mum millimeter-wave GaAs pseudomorphic HEMTs through the accurate prediction of critical performance indicators, such as the linear maximum power gain or the stability factor. Despite the simplicity of the proposed model, it proves to be as accurate as typical scalable models provided by foundries. Straightforward application of the scalable modeling approach to the optimum device geometry selection in a typical design problem is also presented.

Electron device modeling requires accurate descriptions of parasitic passive structures connecting the intrinsic electron device to the external world. In conventional approaches, the parasitic phenomena are described by a network of lumped elements. As an alternative, a distributed description can be conveniently adopted. This choice has been proven very appropriate when dealing with device scaling and very high operating frequencies. In this paper, a novel approach to distributed parasitic modeling is adopted for the very first time in association with a nonlinear electron device model. In particular, it is shown how an equivalent intrinsic device and a suitably defined distributed parasitic network can be accurately defined and modeled on the basis of standard measurements and easy electromagnetic simulations. Wide experimental validation based on GaAs pseudomorphic HEMTs is provided, showing accurate prediction capabilities both under small- and large-signal conditions. The proposed model is shown to perform optimally even after periphery scaling.

GaN power switches provide remarkable performance in terms of power-density, reduced parasitics, and high-thermal handling capability that enable the realization of very efficient and compact dc/dc converters. Despite exhibiting state-of-the-art channel conductivity, GaN high electron mobility transistor (HEMT) devices are affected by the degradation of the dynamic ON-Resistance (R _ON ) at increasing OFF-state voltages and operative temperatures. In this paper, a novel laboratory setup and characterization procedure for the dynamic R _ON of GaN HEMT switches in the presence of thermal- and trapping-effects is presented. The proposed setup allows the study of R _ON transients after the switching event at variable off-state voltages and temperatures. The use of custom-designed differential amplification stages and a voltage-controlled current source enables the accurate characterization of R _ON even on large periphery devices. At first, the proposed setup is tested with a well-established and mature device technology such as a Si MOSFET. Degradation of the R _ON up to 120% due to temperature variation is observed with the presented setup. The setup is then used for the characterization of commercial-grade GaN-on-SiC and GaN-on-Si HEMTs. For both technologies dynamic R _ON degradations up to 75% and 20% are observed for temperature and OFF-state voltage variations, respectively. These characterization data are fundamental for the accurate estimation of conduction losses during the design of switching-mode power converters.

Two C-band monolithic high power amplifiers (HPAs) have been designed and implemented exploiting a 0.25-μm AlGaN/GaN HEMT process on an SiC substrate. The circuits have been designed for use in transmit/recevie modules of satellite synthetic aperture radar antennas for Earth observation. The design was accurately focused on the HEMTs' electrical and thermal working conditions in order to guarantee the reliable operation required by space applications. The HPAs operate in pulsed conditions with typical pulsewidth of 50 μs and 10% duty cycle: in that regime, the circuits deliver about 40 W with more than 21-dB associated gain and 40% to 45% power-added efficiency in the 5-5.8-GHz band. The achieved performance clearly demonstrates the very high potentiality of this technology for the replacement of GaAs-based HPAs in new generations of this type of systems^.