In this paper, we experimentally demonstrate an ultra-broadband high-performance polarization beam splitter (PBS) based on silicon-on-insulator (SOI) platform. The proposed device is based on a directional coupler consisting of a 70-nm taper-etched waveguide and a slot waveguide with a compact coupling length of 11 microns, the structure of which is suitable for a commercial two-step fabrication process. Benefiting from the preferences of coupling TM mode to slot waveguide and restricting TE mode in taper-etched waveguide, the polarization extinction ratios (PER) for TE and TM polarizations can reach as high as 30 dB and 40 dB at 1550 nm based on experimental results, respectively; besides, an ultra-wide operation bandwidth with PER >20 dB is achieved as ~175 nm from 1450 nm to 1625 nm (covering S, C and L bands), or the bandwidth with PER >25 dB is over ~120 nm from 1462 nm to 1582 nm, which is the largest operation bandwidth to the best of our knowledge. At last, the insertion losses (IL) are −0.17 dB and −0.22 dB for TE and TM polarizations at 1550 nm, respectively.

In recent years, short-reach optical links have attracted much more attention and have come to constitute a key market segment due to the rapid development of data-center applications and cloud services. Four-level pulse amplitude modulation (PAM4) is a promising modulation format to provide both a high data rate and relatively low cost for short-reach optical links. However, the direct detector and low-cost components also pose immense challenges, which are unforeseen in coherent transmission. To compensate for the impairments and to truly meet data rate requirements in a cost-effective manner, various digital signal processing (DSP) technologies have been proposed and investigated for short-reach PAM4 optical links. In this paper, an overview of the latest progress on DSP equalization technologies is provided for short-reach optical links based on PAM4 modulation. We not only introduce the configuration and challenges of the transmission system, but also cover the principles and performance of different equalizers and some improved methods. Moreover, machine learning algorithms are discussed as well to mitigate the nonlinear distortion for next-generation short-reach PAM4 links. Finally, a summary of various equalization technologies is illustrated and our perspective for the future trend is given.

We propose a novel all-optical phase shifted quantizer using cascade step-size MMI. The operation principle has been derived in detail. A 3-bit quantizer and a 5-bit quantizer are designed and simulated based on 220-nm SOI platform to verify the feasibility of the scheme, of which the lengths are all below 200 μm. To the best of our knowledge, they have the most compact footprint compared to the existing all-optical quantizers. In the end, the fabrication error analyses of the proposed quantizers are carried out to verify their stability.

When photonics integrated circuits (PICs) become more massive in scale, the area of chip can’t be taken full advantage of with 2×2 waveguide crossings with a 90° intersection angle. Crossings with small angles would be a better idea to further improve the area utilization, but few works have researched 2×2 crossings with different angles. In this paper, in order to have an ultra-compact footprint and a flexible intersection angle while keeping a high performance, we report a series of compact X-shaped waveguide crossings in silicon-on-insulator (SOI) waveguides for fundamental transverse electric (TE₀) mode, designed by using finite-difference frequency-domain (FDFD) numerical analysis method and a global optimization method. Thanks to inverse design, a compact footprint as small as 4.5 µm² and various angles between two input/output waveguides of 30°, 45°, 60°, 80° and 90° are achieved. Simulation results show that all crossings have good performance of insertion losses (ILs) within 0.1∼0.3 dB and crosstalks (CTs) within −20∼−50 dB in the wavelength range of 1525∼1582 nm. Moreover, the designed crossings were fabricated on a commercially available 220-nm SOI platform. The measured results show that the ILs of all crossings are around 0.2∼0.4 dB and the CTs are around −20 dB∼−32 dB; especially for the 30° intersection angle, the crossing has IL around 0.2 dB and CT around −31 dB in C band. Besides, we theoretically propose an approach of a primary structure processing technique to enhance the device performance with a more compact footprint. This technique is to remove the redundant structures in conjunction with the electric field distribution during the optimization procedure of inverse design. For the new 90° crossing structure produced by it, simulation results show that ILs of 0.29 ± 0.03 dB and CTs of −37 ± 2.5 dB in the wavelength range of 1500∼1600 nm are achieved and the footprint is shrunk by 25.5%.

In order to improve the fabrication robustness of the inverse-designed devices that have complex topology structures, we propose an optimization technique, named as structure transformation (ST), to transform structures of the inverse-designed devices into simple topologies that contain less irregularly tiny features, sharp corners and less boundary regions. The proposed ST technique, based on a new alternately-implementing strategy of optical performance optimization and modified curvature-constrained structure adjustment, effectively facilitates an overall simplification of the structure topologies of devices, enhances their robustness to fabrication uncertainties, and simultaneously maintains or even improves their optical performances. To verify the feasibility of the technique, three types of typical SOI-based devices (T-junction, 1×3 power splitter and 90º crossing) with and without ST were designed, among which the ones without ST were given as control groups. Thanks to the ST, the boundary regions and highly curved ranges in these devices are all significantly reduced, while their performances are well maintained or even improved. Next, the effect of the ST on fabrication tolerances were investigated, and the simulation results show that the devices with ST are more robust to over/under-etching errors than the control groups. At last, the T junction and 1×3 power splitter and their control groups were fabricated each with 6 samples. Measured results show that the performances of the devices with ST deviate from the simulated performances much less than their control groups, which agrees well with the simulated results in fabrication tolerances investigation. Summarily, we proposed and demonstrated a technique that provides the inverse-designed devices new possibilities to achieve simpler topologies with better fabrication robustness and improved performances at the same time.

In this paper, we propose and fabricated a novel scheme of SOI-based 1$\times$3 coupler with variable splitting ratio. The coupler consists of two cascaded MMI with different sizes, and a wide range of splitting ratios from 1:0.1:1 to 1:18:1 can be achieved by modifying the size of the first-step MMI. Using the structure of cascaded step-size MMI, this kind of device has a compact footprint of below 15 μm$\times$15 μm and simple fabrication process. Meanwhile, the simulation analyses prove that the proposed couplers have a large operation bandwidth above 60 nm and be robust to the fabrication errors. Couplers with several splitting ratios were fabricated and well measured. Based on the measurement results, the splitting ratios of fabricated couplers from 1:0.67:1 to 1:18:1 can be achieved, and stable performance with the transmission efficiencies above 80% can be maintained over 50 nm wavelength range, which is the largest operation bandwidth to the best of our knowledge.