Due to the high switching speed of Gallium Nitride (GaN) transistors, parasitic inductances have significant impacts on power losses and electromagnetic interferences (EMI) in GaN-based power converters. Thus, the proper design of high-frequency converters in a simulation tool requires accurate electromagnetic (EM) modeling of the commutation loops. This work proposes an EM modeling of the parasitic inductance of a GaN-based commutation cell on a printed circuit board (PCB) using Advanced Design System (ADS^®) software. Two different PCB designs of the commutation loop, lateral (single-sided) and vertical (double-sided) are characterized in terms of parasitic inductance contribution. An experimental approach based on S-parameters, the Cold FET technique and a specific calibration procedure is developed to obtain reference values for comparison with the proposed models. First, lateral and vertical PCB loop inductances are extracted. Then, the whole commutation loop inductances including the packaging of the GaN transistors are determined by developing an EM model of the device’s internal parasitic. The switching waveforms of the GaN transistors in a 1 MHz DC/DC converter are given for the different commutation loop designs. Finally, a discussion is proposed on the presented results and the development of advanced tools for high-frequency GaN-based power electronics design.

In order to better predict the high-frequency switching operation of transistors in power converters, parasitic elements of these devices such as resistances, inductances, and capacitances must be accurately evaluated. This paper reports on the characterization of a gallium nitride (GaN) packaged power transistor using S-parameters in order to extract the device parasitics. Because the transistor is packaged, a calibration technique is carried out using specific test fixtures designed on FR4 printed circuit board (PCB) in order to get the S-parameters in the transistor plane from the measurement. The proposed method is suitable for a wide range of power devices. In this paper, it is applied to an enhancement-mode GaN high electron mobility transistor (HEMT). The impact of junction temperature on drain and source resistances is also evaluated. According to characterization results, equation-based modeling is proposed for the nonlinear parameters. The extracted parasitic elements are compared with reference values given by the device manufacturer.

Due to the advancement in the development of semiconductors used in the power converters, the printed circuit boards (PCBs) require an in-depth study of their electromagnetic behavior. To characterize the behavior of the PCBs, the Darwin model is employed, which can take into account all the coupled effects, namely resistive, inductive, and capacitive effects, at the intermediate frequencies. Nevertheless, the study of particular structures having a geometric dimension smaller than the others can create meshing difficulties. The modeling of thin structures by the finite element method requires the optimization of the mesh. To circumvent this issue, the shell elements for both node and edge elements are applied in this work. Finally, to validate the proposed approaches, two PCBs with different geometries are studied in both time and frequency domains, where the measurements for a single PCB are provided to compare with the numerical results.

In order to design efficient power converter operating at high switching frequencies, the electromagnetic behavior of the printed circuit board (PCB) must be well known. Then, numerical approaches can be used to study the voltage and current waveforms as well as the current density distribution associated with a PCB. Considering a half-bridge converter connected to a passive electrical load, we propose a co-simulation based on the Cauer ladder network approach providing an equivalent circuit of the PCB combined with models of GaN transistors. The results from the co-simulation are compared with measurements at 1 MHz with an output power of 200 W.

Wide Bandgap (WBG) power devices show very good characteristics for high frequency operation in power converters, leading to a better power integration by reducing size and weight of passive components. Access parasitics such as resistances and inductances related to packaging and interconnections are important parameters to determine in order to better predict high frequency switching of WBG power devices. In order to design a 1 MHz hybrid GaN/SiC power converter, this paper reports on the characterization of packaged power devices such as Gallium Nitride (GaN) transistors and Silicon Carbide (SiC) Schottky diodes using S- parameters in order to extract the device parasitics. The method lays on a calibration procedure carried out using specific test fixtures designed on FR4 Printed Circuit Board (PCB). The proposed method has the objective to be suitable for a wide range of power devices.

This paper presents a novel analytical framework for the design and understanding of class EF inverters under both optimal and non-optimal load conditions. Unlike conventional approaches that rely heavily on numerical simulations, the proposed method provides a fast, visual, and intuitive tool for analyzing inverter operation. Its effectiveness is demonstrated experimentally on a 15 MHz class EF inverter across three distinct load conditions, showing good agreement with theoretical predictions. To highlight the robustness and broad applicability of the approach, a class ${\Phi }_2$ inverter—a lumped-element analog of the class EF inverter—is also implemented and successfully analyzed. By combining theoretical insight, experimental validation, and generalization to alternative topologies, the proposed framework offers an efficient, accessible, and versatile tool for high-frequency resonant inverter design.