Breast cancer is currently the most often diagnosed tumour for women. Providing a safe and accurate imaging technique for early detection is one of the mains focuses on different research groups. Microwave Imaging has emerged as a complementary modality among mammography and ultrasound. It is capable of identifying a millimetre size tumour inner even in a dense breast. However, it has a limited spatial resolution and is sensitive to artefacts that can degrade the image quality. The challenge of this technique lies in a system design targeting operational frequency range that guarantees repeatability, with specificity and sensitivity values taking to positive impacts on the exam results, for future acceptance and clinical use. This paper aimed to depict the unfolded systems that employ the microwave technique and describe their apparatus solutions and key features. It is a review that focuses on practical results and highlights those that are the most advanced. In addition, a comprehensive review of the literature on Microwave Imaging and systems is presented. Since there is no consensus on the best apparatus configuration, linked to the fact that only some research groups have stated clinical results with patients employing their device, the question of clinical acceptance of Microwave Imaging in breast cancer detection is raised and discussed. Yet, some systems have reported astonishing practical results that were presented and compared with other modalities, and due to this, we recommend continued efforts for the broader application of this technique in breast cancer detection.

This work presents the design and experimental results of a current mode Scalable Low-Voltage Signaling (SLVS) transceiver in 130 nm CMOS technology. The proposed transmitter includes a feedback control which reduces the common-mode voltage variations in terms of the Vds voltage of the bias transistor, and an enable/disable operation mode, which minimizes the power consumption when data transmission is not requested. A rail-to-rail comparator topology was used to design the receiver circuit being robust to transient common-mode variations with low power consumption and high speed. The experimental DC power consumption of the transceiver is 4.6 mW at 1.25V power supply, where 1.1 mW is consumed by the receiver and 3.5 mW by the transmitter. The eye diagram proves the proper dynamic operation of the circuit until a data rate of 1.2Gbps.

Technology scaling made possible to increase IC capabilities from one node to the next by adding more transistors within the same die area while keeping a low pin count. As a consequence, test complexity increased exponentially, requiring engineers to use not only better test pattern generation software, but also powerful and expensive Automatic-Test-Equipments (ATE), usually not viable and accessible for small fabless start-ups and universities. In this work, we propose a low-cost and flexible ATE intended for manufacturing tests of the digital part of a multi-million gate industrial mixed signal ASIC produced in a 130nm technology that will be used at CERN in the ALICE experiment. The proposed ATE was built upon a ready-to-use platform including an embedded ARM-based processor and a FPGA to effectively apply the test vectors via the Device-Under-Test (DUT) scan chains in a feasible time and viable cost without the need for a PC. The ATE was operated to execute in-series manufacturing tests on two versions of the SAMPA chip, allowing identifying on-silicon defects.