TiN/ferroelectric-HfZrOx (FE-HZO)/TiN capacitors were employed as the platform to investigate the impact of plasma treatment on reliability of FE-HZO. NH3 plasma treatment at different HZO/TiN interfaces was carried out to study the dependence of oxygen vacancies (Vo) on FE behaviors against cycling. It has been electrically confirmed that HZO free from wake-up and fatigue effects up to 106 cycles (± 2.5 MV/cm, long pulses of 1 ms) with high κ value of 29~30, low leakage current can be achieved by treatments at both top and bottom interfaces. It is a great advance for HfO2-based FE and is mainly attributed to significant reduction of Vo in HZO, especially the treatment at the bottom interface which greatly suppresses the formation of oxygen-deficient HZO. Fewer Vo in NH3-plasma-treated HZO has also been confirmed by physical analysis. The plasma treatment has shed light on a feasible approach to enhance FE reliability.

We fabricated the HfZrO ₂ (HZO) ferroelectric fin field-effect transistors (Fe-FinFET) with fin width of 60 nm and gate length of 100 nm for ferroelectric nonvolatile memory operations. The fabricated Fe-FinFET exhibited a large memory window (MW) of 1.5 V and high (100 ns) program/erase speeds at ±5 V. After 10 ⁵ program/erase cycles, the MW was maintained at 1.09 V and the retention time was measured up to 10 ⁴ s with no degradation. The fabricated HZO Fe-FinFET is compatible with the current FinFET process and has a high MW, a fast program/erase speed, and excellent reliability. Therefore, the fabricated Fe-FinFET is a promising candidate for high-density ferroelectric field-effect transistor memory applications.

A thin film of AlON with a nitrogen concentration of 13% was developed as the interfacial layer (IL) of HfZrO_x-based ferroelectric field-effect transistor (FeFET) memory devices on a Si substrate. Compared to the conventional SiO₂/SiON IL, due to a higher dielectric constant value that allows a smaller voltage drop across it and a larger valence band offset (ΔEv) with respect to Si along with prominent passivation of Si dangling bonds that effectively suppress hole trapping, memory devices with the AlON IL demonstrate a large memory window (MW) of 3.12 V by ±4 V gate voltage sweeping, robust endurance after 10⁵ cycles with a long pulse width of 10⁻⁴ s, and a stable MW of 2.95 V up to 10 years, standing out from other HfZrO_x-based FeFET memory reported in the literature. Furthermore, the AlON IL can be integrated with HfZrO_x in the same atomic layer deposition step, which greatly simplifies the process. From the device performance and process integration points of view, the AlON IL unleashes the potential of FeFET memory by enabling high reliability with a large MW.

The Si-based n- and p-FeFET with 5-nm ferroelectric (FE) HfZrO _x (HZO) and high-k AlON interfacial layer (IL) were fabricated for the comparison of memory characteristics and reliability. The memory window (MW) of 1.37 V and 1.25 V are obtained by the n- and p-FeFET respectively by applying pulses of ±3.8 V/ 50 μ s. The typical MW asymmetry for both types of FeFETs is significantly reduced which is attributed to the reduced remanent polarization ( P _r ) from the highly scaled HZO and the enhanced voltage drop across the HZO as well as the improved interfacial quality from the AlON IL. In addition, the p-FeFET demonstrates a MW of 1.02 V up to $10^{{5}}$ cycles with a long pulse 10 ^-4 s, superior to that of the n-FeFET due to the mitigated hot-electrons induced hole generation. Furthermore, the p-FeFET shows comparable retention performance with the n-FeFET. These results indicate that the p-FeFET possesses the competence of future memory applications without adding process complexity and introducing new substrate material.