Francesca Palumbo

Dr. Francesca Palumbo


Research Focus & Metrics

Academic Career Length

15Years (2012-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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5 June 2021 in Sensors
Verified
Journal Article
Open access
PDF file
LGLuca Ghiani
Luca Ghiani
ASAlberto Sassu
Alberto Sassu
FPFrancesca Palumbo
Francesca Palumbo
LMluca mercenaro
luca mercenaro
Filippo GambellaFilippo Gambella
Filippo Gambella
An early estimation of the exact number of fruits, flowers, and trees helps farmers to make better decisions on cultivation practices, plant disease prevention, and the size of harvest labor force. The current practice of yield estimation based on manual counting of fruits or flowers by workers is a time consuming and expensive process and it is not feasible for large fields. Automatic yield estimation based on robotic agriculture provides a viable solution in this regard. In a typical image classification process, the task is not only to specify the presence or absence of a given object on a specific location, while counting how many objects are present in the scene. The success of these tasks largely depends on the availability of a large amount of training samples. This paper presents a detector of bunches of one fruit, grape, based on a deep convolutional neural network trained to detect vine bunches directly on the field. Experimental results show a 91% mean Average Precision.

10 November 2012 in Journal of Real-Time Image Processing
Verified
Journal Article
Closed access
PDF file
FPFrancesca Palumbo
Francesca Palumbo
NCNicola Carta
Nicola Carta
Danilo PaniDanilo Pani
Danilo Pani
PMPaolo Meloni
Paolo Meloni
LRLuigi Raffo
Luigi Raffo

9 February 2016 in Journal of Signal Processing Systems
Verified
Journal Article
Closed access
PDF file
FPFrancesca Palumbo
Francesca Palumbo
TFTiziana Fanni
Tiziana Fanni
Carlo SauCarlo Sau
Carlo Sau
PMPaolo Meloni
Paolo Meloni

1 January 2015 in IET Computers & Digital Techniques
Verified
Journal Article
Open access
PDF file
FPFrancesca Palumbo
Francesca Palumbo
Carlo SauCarlo Sau
Carlo Sau
LRLuigi Raffo
Luigi Raffo
Power reduction in modern embedded systems design is a challenging issue exacerbated by the complexity and heterogeneity of their architecture. In the field of Reconfigurable Video Coding (RVC), to challenge these issues and cut‐down time to market, dataflow‐based techniques have been adopted. In particular, to master management and composability of dynamically reconfigurable systems, the authors have developed the multi‐dataflow composer. Nevertheless, despite the RVC offers several different tools, in its reference design framework power management is still an open issue. To make some steps forward towards filling this gap, in this study, they address power management for coarse‐grained reconfigurable systems combining structural and dynamic strategies, both to be applied at the dataflow level.

1 February 2021 in Microprocessors and Microsystems
Verified
Journal Article
Closed access
CSCarlo Sau
Carlo Sau
TFTiziana Fanni
Tiziana Fanni
CRClaudio Rubattu
Claudio Rubattu
LRLuigi Raffo
Luigi Raffo
FPFrancesca Palumbo
Francesca Palumbo

26 April 2023 in Journal of Signal Processing Systems
Verified
Journal Article
Open access
PDF file
FRFrancesco Ratto
Francesco Ratto
ÁMÁngela Porras Máinez
Ángela Porras Máinez
Carlo SauCarlo Sau
Carlo Sau
PMPaolo Meloni
Paolo Meloni
GDGianfranco Deriu
Gianfranco Deriu
FPFrancesca Palumbo
Francesca Palumbo
Image and video processing are one of the main driving application fields for the latest technology advancement of computing platforms, especially considering the adoption of neural networks for classification purposes. With the advent of Cyber Physical Systems, the design of devices for efficiently executing such applications became more challenging, due to the increase of the requirements to be considered, of the functionalities to be supported, as well as to the demand for adaptivity and connectivity. Heterogeneous computing and design automation are then turning into essential. The former guarantees a variegated set of features under strict constraints (e.g., by adopting hardware acceleration), and the latter limits development time and cost (e.g., by exploiting model-based design). In this context, the literature is still lacking adequate tooling for the design and management of neural network hardware accelerators, which can be adaptable and customizable at runtime according to the user needs. In this work, a novel almost automated toolchain based on the Open Neural Network eXchange format is presented, allowing the user to shape adaptivity right on the network model and to deploy it on a runtime reconfigurable accelerator. As a proof of concept, a Convolutional Neural Network for human/animal classification is adopted to derive a Field Programmable Gate Array accelerator capable of trading execution time for power by changing the resources involved in the computation. The resulting accelerator, when necessary, can consume 30% less power on each layer, taking about overall 8% more time to classify an image.