In most grid-connected power converter applications, the phase-locked loop (PLL) is probably the most widespread grid synchronization technique, owing to its simple implementation. However, its phase-tracking performance tends to worsen when the grid voltage is under unbalanced and distorted conditions. Many filtering techniques are utilized to solve this problem, however, at the cost of slowing down the transient response. It is a major challenge for PLL to achieve a satisfactory dynamic performance without degrading its filtering capability. To tackle this challenge, a hybrid filtering technique is proposed in this paper. Our idea is to eliminate the fundamental frequency negative sequence (FFNS) and other harmonic sequences at the prefiltering stage and inner loop of PLL, respectively. Second-order generalized integrators (SOGIs) are used to remove FFNS before the Park transformation. This makes moving average filters (MAFs) eliminate other harmonics with a narrowed window length, which means the time delay that is caused by MAFs is reduced. The entire hybrid filtering technique is included in a quasi-type-1 PLL structure (QT1-PLL), which can provide a rapid dynamic behavior. The small-signal model of the proposed PLL is established. Based on this model, the parameter design guidelines targeting the fast transient response are given. Comprehensive experiments are carried out to confirm the effectiveness of our method. The results show that the settling time of the proposed PLL is less than one grid cycle, which is shorter than most of the widespread PLLs. The harmonic rejection capability is also better than other methods, under both nominal and adverse grid conditions.

Frequency stability in an isolated grid can be easily impacted by sudden load or wind speed changes. Many frequency regulation techniques are utilized to solve this problem. However, there are only few studies designing torque compensation controllers based on power performances in different Speed Parts. It is a major challenge for a wind turbine generator (WTG) to achieve the satisfactory compensation performance in different Speed Parts. To tackle this challenge, this paper proposes a gain scheduled torque compensation strategy for permanent magnet synchronous generator (PMSG) based wind turbines. Our main idea is to improve the anti-disturbance ability for frequency regulation by compensating torque based on WTG speed Parts. To achieve higher power reserve in each Speed Part, an enhanced deloading method of WTG is proposed. We develop a new small-signal dynamic model through analyzing the steady-state performances of deloaded WTG in the whole range of wind speed. Subsequently, H_∞ theory is leveraged in designing the gain scheduled torque compensation controller to effectively suppress frequency fluctuation. Moreover, since torque compensation brings about untimely power adjustment in over-rated wind speed condition, the conventional speed reference of pitch control system is improved. Our simulation and experimental results demonstrate that the proposed strategy can significantly improve frequency stability and smoothen power fluctuation resulting from wind speed variations. The minimum of frequency deviation with the proposed strategy is improved by up to 0.16 Hz at over-rated wind speed. Our technique can also improve anti-disturbance ability in frequency domain and achieve power balance.

In renewable energy generation applications, phase locked loop (PLL) is one of the most popular grid synchronization technique. The main objective of PLL is to rapidly and precisely extract phase and frequency especially when the grid voltage is under non-ideal conditions. This motivates the recent development of moving average filters (MAFs) based PLL in a quasi-type-1 system (i.e., QT1-PLL). Despite its success in certain applications, the transient response is still unsatisfactory, mainly due to the fact that the time delay caused by MAFs is still large. This has significantly limited the utilization of QT1-PLL, according to common grid codes such as German and Spanish grid codes. This challenge has been tackled in this paper. The basic idea is to develop a new hybrid filtering stage, consisting of adaptive notch filters (ANFs) and MAFs, arranged at the inner loop of QT1-PLL. Such an idea can greatly improve the transient response of QT1-PLL, owing to the fact that ANFs are utilized to remove the fundamental frequency negative voltage sequence (FFNS) component while other dominant harmonics can be removed by MAFs with a small time delay. By applying the proposed technique, the settling time is reduced to less than one cycle of grid frequency without any degradation in filtering capability. Moreover, the proposed PLL can be easily expanded to handle dc offset rejection. The effectiveness is validated by comprehensive experiments.