In this paper, a dual-band conductive textile-based wearable antenna operating at LoRa-868 MHz and BLE-2.4 GHz is presented. The proposed antenna is intended for accurate geolocation, tracking and communication applications in the military, industrial and telemedicine industries. The low-profile patch antenna is suitable for integrating into clothing. It is composed of three textile layers: top and bottom silver-ink-printed polystyrene fabrics, and a neoprene substrate. To utilize the flexible and restorable properties of these textile materials, the proposed antenna is directly fed by a flexible cable using an aperture-coupled feeding technique. This method not only eliminates the use of the conventional, bulky, and metallic SMA connector but also introduces a secondary resonance at 2.4 GHz, enabling the dual-band property. Using a thin coaxial cable fixed on the aperture slot for proximity coupling, a compact antenna size of 150 mm2 is obtained that can easily be attached and detached on existing cloths. The proposed structure has been fabricated and measured in an anechoic chamber to verify the performance. Measured gain of 3.28 dBi and 3.25 dBi was realized for LoRa and BLE at an antenna size of 0.61 λg × 0.61 λg × 0.012 λg (where λg is guided wavelength at 868 MHz) with a front-to-back ratio (FBR) of greater than 10 dBi.
10 December 2007 in IEEE Transactions on Microwave Theory and Techniques
A 10-Gb/s data transmission over optical fiber is limited in reach due to optical dispersion phenomena that results in inter-symbol interference. Electronic dispersion compensators employing linear and nonlinear equalization techniques are a compact, cost-effective, and adaptive alternative to optical dispersion compensating techniques and devices that are often bulky, expensive, and not adaptive. The decision-feedback equalizer (DFE) is a type of nonlinear equalizer that can effectively compensate for the nonlinear dispersion effects exhibited by fiber channels. However, at multigigabit/second data rates, the implementation of the DFE is challenged by the first feedback-loop latency requirements and process technology speed limitations. This study demonstrates a novel analog approach and circuit architecture to perform decision-feedback equalization at multigigabit/second data rates. The analog decision-feedback equalizer (ADFE) consists of a four-tap linear analog feed-forward filter and a one-tap nonlinear analog feedback filter and is implemented in a 0.18-mum CMOS process. The ADFE is completely differential and a broadband single-differential converter is designed for the ADFE front-end to interface with the single-ended output of a photodetector. The circuit is unclocked and uses current-mode logic techniques. The ADFE is used to extend the transmission distance of multimode fiber at 10-Gb/s to 300 in and of single-mode fiber to 120 km.
In this paper, a new topology for a high-power single-pole-double-throw (SPDT) antenna switch is presented, and its loss mechanisms are fully analyzed. The differential architecture is employed in the proposed switch implementation to prevent unwanted channel formations of OFF-state Rx switch transistors by relieving the voltage swing over the Rx switch devices. In addition to that, the load impedance seen by the Tx switch is stepped down to reduce the voltage swing even more, allowing the antenna switch to handle a high-power signal without distortions. To drop the switch operating impedance, two matching networks are required at the input and the output of the Tx switch, respectively, and they are carefully implemented considering the integration issue of the front-end circuitries. From the loss analysis of the whole signal path, an optimum switch operating impedance is decided in view of a trade-off between power handling capability and insertion loss of the antenna switch. The insertion loss of the proposed design is compared to the conventional design with electromagnetic (EM) simulated transformer and inductors. The proposed antenna switch is implemented in a standard 0.18 µm CMOS process, and all switch devices adopt the deep n-well structure. The measured performance of the proposed transmitter front-end chain shows a 1 dB compression point (P1dB) of 32.1 dBm with 38.3% power-added efficiency (PAE) at 1.9 GHz.
31 December 2015 in The Journal of The Korea Institute of Intelligent Transport Systems
Considerations on a Transportation Simulation Design Responding to Future Driving simulation;microscopic model;approximability;flexibility;scalability; Recent proliferation of advanced technologies such as wireless communication, mobile, sensor technology and so on has caused significant changes in a traffic environment. Human beings, in particular drivers, as well as roads and vehicles were advanced on information, intelligence and automation thanks to those advanced technologies; Intelligent Transport Systems (ITS) and autonomous vehicles are the results of changes in a traffic environment. This study proposed considerations when designing a simulation model for future transportation environments, which are difficult to predict the change by means of advanced technologies. First of all, approximability, flexibility and scalability were defined as a macroscopic concept for a simulation model design. For actual similarity, calibration is one of the most important steps in simulation, and Physical layer and MAC layer should be considered for the implementation of the communication characteristics. Interface, such as API, for inserting the additional models of future traffic environments should be considered. A flexible design based on compatibility is more important rather than a massive structure with inherent many functions. Distributed computing with optimized H/W and S/W together is required for experimental scale. The results of this study are expected to be used to the design of future traffic simulation.
This paper proposes an optimized program operation method for ferroelectric NAND (FE-NAND) flash memory utilizing the gate-induced drain leakage (GIDL) program and validated through simulations. The program operation was performed by setting the time for the unselected cell to reach the pass voltage (Vpass) to 0.1 µs, 0.2 µs, and 0.3 µs, respectively. As the time for the unselected word line (WL) to reach Vpass increases, the channel potential increases due to a decrease in the electron–hole recombination rate. After the program operation, the threshold voltage (Vth) shift of the selected cell and the pass disturb of the unselected cells according to the Vpass condition were analyzed. Consequently, there was a more significant change in Vth among selected cells compared to the time for unselected cells to reach Vpass as 0.1 µs. The findings of this study suggest an optimal program operation that increases slowly and decreases rapidly through the variation of Vth according to the program operation. By performing the proposed program operation, we confirmed that low-power operation is achievable by reducing the WL voltage by 2 V and the bit line (BL) voltage by 1 V, in contrast to the conventional GIDL program.
30 October 2020 in Analog Integrated Circuits and Signal Processing