Lining ZHANG

Prof. Lining ZHANG


Research Focus & Metrics

Academic Career Length

20Years (2007-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

View All Publications
1 May 2012 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
HLHaijun Lou
Haijun Lou
LZLining ZHANG
Lining ZHANG
YZYunxi Zhu
Yunxi Zhu
XLXinnan Lin
Xinnan Lin
SYShengqi Yang
Shengqi Yang
Mansun ChanMansun Chan
Mansun Chan
A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed in this paper. Its characteristic is demonstrated and compared with a generic single-material-gate JNT using 3-D numerical simulations. The results show that the DMG-JNT has a number of desirable features, such as high ON-state current, a large ON/OFF current ratio, improved transconductance Gm, high unity-gain frequency fT, high maximum oscillation frequency fMAX, and reduced drain-induced barrier lowering. The effects of different control gate ratios Ra and varied work-function differences between the two gates are studied. Finally, the optimization of Ra and the work-function difference for the proposed DMG-JNT is presented.

9 April 2017 in Journal of Computational Electronics
Verified
Journal Article
Closed access
PDF file
LZLining ZHANG
Lining ZHANG
MCMansun Chan
Mansun Chan

16 November 2012 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
LZLining ZHANG
Lining ZHANG
XLXinnan Lin
Xinnan Lin
JHJin He
Jin He
Mansun ChanMansun Chan
Mansun Chan
An analytical charge model for double gate (DG) tunnel FETs (TFETs) is proposed. By splitting the TFET into a series combination of a gated tunnel diode and a DG MOSFET, we solved the Poisson equation with matching boundary conditions to obtain a surface potential model for the DG TFET. Based on that, the source depletion charge and the mobile channel charge are derived. Comparisons between the proposed model and TCAD simulations show good agreements and suggest a 100/0 drain/source channel inversion charge partition. Terminal capacitances calculated based on the proposed charge model are also evaluated and show good agreement with TCAD simulations.

17 January 2014 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
AZAixi Zhang
Aixi Zhang
LZLining ZHANG
Lining ZHANG
ZTZhikai Tang
Zhikai Tang
XCXiaoxu Cheng
Xiaoxu Cheng
YWYan Wang
Yan Wang
Mansun ChanMansun Chan
Mansun Chan
In this paper, a surface potential-based terminal charge and capacitance model, including parasitic components for AlGaN/GaN HEMTs is developed. First, by solving the charge control equations, the sheet charge density in the channel is modeled with a close-form expression. Then, using this result, based on the surface potential definition, the intrinsic terminal charges and capacitances are derived consistently with current model. Finally, by introducing parasitic components, the capacitances for the full structure of the HEMT devices are given. The model is evaluated step-by-step with good agreements compared with the TCAD simulations and the experimental data. Meanwhile, the effects of bulk traps and surface traps in the capacitances are analyzed. The complete model, including currents and capacitances has been implemented in i-MOS platform for evaluations and circuit simulations.

25 July 2008 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
FLFeng Liu
Feng Liu
JHJin He
Jin He
LZLining ZHANG
Lining ZHANG
JZJian Zhang
Jian Zhang
JHJinghua Hu
Jinghua Hu
Mansun ChanMansun Chan
Mansun Chan
A charge-based model is presented for long-channel cylindrical surrounding-gate (SRG) MOSFETs from an intrinsic channel to a heavily doped body. The model derivation is based on an accurate inversion charge solution of Poisson's equation in a cylindrical coordinate system. The general drain-current equation is obtained from Pao-Sah's dual integral, which is expressed as a function of inversion charge at the source and drain terminals. The model is valid for all regions of operation without employing any smoothing function. The model has been extensively verified by numerical simulations with a wide range of SRG MOSFET geometry parameters and channel doping concentrations, including the undoped channel.

1 December 2012
Verified
Conference Paper
Closed access
LZLining ZHANG
Lining ZHANG
JHJin He
Jin He
Mansun ChanMansun Chan
Mansun Chan
A compact model for tunneling field-effect-transistors (TFETs) is presented. The model includes a band-to-band tunneling (BTBT) current module and a terminal charge module. TCAD simulations show that the model describes TFETs currents and capacitances accurately. The model is implemented into a circuit simulator and used to simulate TFETs logic circuits and SRAMs. Unique features in TEFTs including large overshoot during switching, long delay and uni-directional conduction are demonstrated.