Marek Kropidlowski

Dr. Marek Kropidlowski

Faculty of Computing and Telecommunications, Poznań University of Technology, 60-965 Poznań, Poland
orcid

Research Focus & Metrics

Academic Career Length

25Years (2002-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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1 April 2015 in Expert Systems with Applications
Verified
Journal Article
Closed access
AHAndrzej Handkiewicz
Andrzej Handkiewicz
Szymon SzczęsnySzymon Szczęsny
Szymon Szczęsny
MNMariusz Naumowicz
Mariusz Naumowicz
PKPiotr Katarzyński
Piotr Katarzyński
MMMichał Melosik
Michał Melosik
MKMarek Kropidlowski
Marek Kropidlowski

1 April 2014 in Expert Systems with Applications
Verified
Journal Article
Closed access
AHAndrzej Handkiewicz
Andrzej Handkiewicz
PKPiotr Katarzyński
Piotr Katarzyński
Szymon SzczęsnySzymon Szczęsny
Szymon Szczęsny
MNMariusz Naumowicz
Mariusz Naumowicz
MMMichał Melosik
Michał Melosik
MKMarek Kropidlowski
Marek Kropidlowski

17 February 2020 in IEEE Sensors Journal
Verified
Journal Article
Closed access
Szymon SzczęsnySzymon Szczęsny
Szymon Szczęsny
MKMarek Kropidlowski
Marek Kropidlowski
MNMariusz Naumowicz
Mariusz Naumowicz
The article presents implementation details of a Sigma-Delta modulator for use in ADC converters of signals with a really low amperage, i.e. up to 1 nA. The paper describes an adaptation of the moderate-inversion technique for processing biomedical signals obtained using amperometric measurements or measurements of living organisms. The analog part of the circuit operates in current mode. The modulator structure is based on a current-to-frequency converter and was designed using the classic digital 65 nm CMOS technology. The paper presents results obtained using post-layout simulations of the modulator. The modulator is able to process frequencies up to 10 kHz and is sampled with a 10 MHz frequency. SNDR was obtained at the level of 55.1 dB and SNR equaling 58.2 dB. The input impedance of the presented AFE occurs at 1 GQ. The power consumption of the whole circuit equals 276 nW and the circuit occupies 0.00442 mm2 of area, which also makes it suitable for implantable-chip applications. The paper is concluded with analyses of sensitivity of the circuit.

2 December 2008 in International Journal of Circuit Theory and Applications
Verified
Journal Article
Closed access
PDF file
RRRadek Rudnicki
Radek Rudnicki
MKMarek Kropidlowski
Marek Kropidlowski
AHAndrzej Handkiewicz
Andrzej Handkiewicz

7 May 2022 in Electronics
Verified
Journal Article
Open access
PDF file
MMMichał Melosik
Michał Melosik
MNMariusz Naumowicz
Mariusz Naumowicz
MKMarek Kropidlowski
Marek Kropidlowski
WMWieslaw Marszalek
Wieslaw Marszalek
This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of the IoT concept, in which the final device is a test board with an FPGA chip. The system allows for remote visual inspection of the board and the devices linked to it in the laboratory. The system was developed for remote learning taking place during the lockdown periods at Poznan University of Technology (PUT) in Poland. The functionality of the system is confirmed by two demonstration tasks (the use of the temperature and humidity DHT11 sensor and the design of a generator of sinusoidal waveforms) for students in the fundamentals of digital design and synthesis courses. The proposed solution allows, in part, to bypass the time-consuming simulations, and accelerate the process of prototyping digital circuits by remotely accessing the infrastructure of the microelectronics laboratory.

6 November 2017 in Analog Integrated Circuits and Signal Processing
Verified
Journal Article
Closed access
PDF file
AHAndrzej Handkiewicz
Andrzej Handkiewicz
SSSzymon Szczȩsny
Szymon Szczȩsny
MKMarek Kropidlowski
Marek Kropidlowski