In this paper we discuss in detail the resonance and oversampling features of the 0/1 test for chaos in continuous systems and propose methods to avoid those undesired features. Our method is based on certain frequency properties of the 0/1 test. When reconstructing the phase space, our approach is compared with the first minimum of the mutual information method. Several numerical results for typical chaotic systems (including memristive circuits) are included.

The use of the 0‐1 test for chaos to monitor chaotic bit generators susceptible to unauthorised changes and modifications of the circuits’ parameters (hardware trojans) is presented. The 0‐1 test proves that the chaotic nature of the continuous time signals is inherited by the bit sequences even when a simple threshold comparator is used. Simulation results with the Chua and Lindberg–Murali–Tamasevicius circuits are presented.

This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of the IoT concept, in which the final device is a test board with an FPGA chip. The system allows for remote visual inspection of the board and the devices linked to it in the laboratory. The system was developed for remote learning taking place during the lockdown periods at Poznan University of Technology (PUT) in Poland. The functionality of the system is confirmed by two demonstration tasks (the use of the temperature and humidity DHT11 sensor and the design of a generator of sinusoidal waveforms) for students in the fundamentals of digital design and synthesis courses. The proposed solution allows, in part, to bypass the time-consuming simulations, and accelerate the process of prototyping digital circuits by remotely accessing the infrastructure of the microelectronics laboratory.

In this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs) fabricated in complementary metal oxide semiconductor (CMOS) technologies. While discussing the vision chip realizations the importance of low-cost, low-power solutions is highlighted, which are increasingly being used in intelligent consumer equipment. Thanks to the great development of the automated design environments and fabrication methods, new, so far unknown applications of the vision chips become possible, as for example disposable endoscopy capsules for photographing the human gastrointestinal tract for the purposes of medical diagnosis.