InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness (t_ITO, respectively, 6, 9, 12, and 15 nm) on device performance and positive bias stress (PBS) stability of the ITO TFTs are examined. We found that content of oxygen defects positively correlates with t_ITO, leading to increases of both trap states as well as carrier concentration and synthetically determining electrical properties of the ITO TFTs. Interestingly, the ITO TFTs with a t_ITO of 9 nm exhibit the best performance and PBS stability, and typical electrical properties include a field-effect mobility (µ_FE) of 37.69 cm²/Vs, a V_on of −2.3 V, a SS of 167.49 mV/decade, and an on–off current ratio over 10⁷. This work paves the way for practical application of the ITO TFTs.

We examine low-temperature fabricated InSnO/ZnO (ITO/ZnO) heterojunction thin-film transistors (TFTs) with high mobility and excellent stability. The effects of ITO thickness (0, 2, 4, 6, and 8 nm) on performance of the ITO/ZnO TFTs are studied. For the devices with a 6-nm ITO layer, a field-effect mobility ( $\mu _{\mathrm{FE}}$ ) of 55.50 cm ² /Vs, a subthreshold swing (SS) of 113.22 mV/decade, a turn-on voltage ( $\text{V}_{\mathrm{ON}}$ ) of −3 V, and an on/off current ratio ( $\text{I}_{\mathrm{ON}}/\text{I}_{\mathrm{OFF}}$ ) over 10 ⁷ are obtained. Besides, the devices demonstrate excellent stability with a threshold voltage shift of 0.68 and −0.25 V under the positive and negative gate-bias stress, respectively. Operation mode of the ITO/ZnO TFTs is analyzed. The results show that potential well at ITO/ZnO heterointerface forms electronic accumulation, which is beneficial to improve the $\mu _{\mathrm{FE}}$ of the ITO/ZnO TFTs. Our work promotes applications of the oxide TFTs to back-end-of-line (BEOL) circuits.

Oxide thin-film transistors (TFTs) are of increasing interest in the field of advanced displays. In this work, we explore Al, InSnO (ITO), Ti, and Mo as source/drain electrodes of ITO TFTs. A comparison study is conducted on the electrical properties of ITO TFTs with the four categories of source/drain electrodes. Interestingly, the ITO TFT with an Al source/drain electrode exhibits better device performance, such as a field-effect mobility (μ_FE) of 26.45 cm²/Vs, a reasonable turn-on voltage (V_ON) of 2.7 V, and a steep subthreshold swing (SS) of 201.50 mV/decade. The contact properties of ITO TFTs are further analyzed, and the results show that the device with an Al electrode exhibits lower contact resistance than the other devices. However, the devices with the four electrode materials all reveal excellent stability under negative bias illumination stress (NBIS) with |ΔV_TH| < 1 V. This work paves the way for the practical applications of ITO TFTs in next-generation displays.

Transparent conductive oxides (TCO) have been extensively investigated as channel materials for thin-film transistors (TFTs). In this study, highly transparent and conductive InSnO (ITO) and ZnO films were deposited, and their material properties were studied in detail. Meanwhile, we fabricated ZnO/ITO heterojunction TFTs, and explored the effects of channel structures on the hump characteristics of ZnO/ITO TFTs. We found that V_hump–V_ON was negatively correlated with the thickness of the bottom ZnO layer (10, 20, 30, and 40 nm), while it was positively correlated with the thickness of the top ITO layer (3, 5, 7, and 9 nm), where V_hump is the gate voltage corresponding to the occurrence of the hump and V_ON is the turn-on voltage. The results demonstrated that carrier transport forms dual current paths through both the ZnO and ITO layers, synthetically determining the hump characteristics of the ZnO/ITO TFTs. Notably, the hump was effectively eliminated by reducing the ITO thickness to no more than 5 nm. Furthermore, the hump characteristics of the ZnO/ITO TFTs under positive gate-bias stress (PBS) were examined. This work broadens the practical application of TCO and provides a promising method for solving the hump phenomenon of oxide TFTs.