The failure mechanisms of Cu–Cu bumps under thermal cycling test (TCT) were investigated. The resistance change of Cu–Cu bumps in chip corners was less than 20% after 1000 thermal cycles. Many cracks were found at the center of the bonding interface, assumed to be a result of weak grain boundaries. Finite element analysis (FEA) was performed to simulate the stress distribution under thermal cycling. The results show that the maximum stress was located close to the Cu redistribution lines (RDLs). With the TiW adhesion layer between the Cu–Cu bumps and RDLs, the bonding strength was strong enough to sustain the thermal stress. Additionally, the middle of the Cu–Cu bumps was subjected to tension. Some triple junctions with zig-zag grain boundaries after TCT were observed. From the pre-existing tiny voids at the bonding interface, cracks might initiate and propagate along the weak bonding interface. In order to avoid such failures, a postannealing bonding process was adopted to completely eliminate the bonding interface of Cu–Cu bumps. This study delivers a deep understanding of the thermal cycling reliability of Cu–Cu hybrid joints.

Highly (111)-oriented nanotwinned Cu (nt-Cu) films were fabricated on silicon wafers for thermal-stress characterization. We tailored the microstructural features (grain scale and orientation) of the films by tuning the electroplating parameters. The films were heat-treated and the relaxation behaviors of thermal stresses in the films were explored using a bending beam system. Focused ion beam (FIB) and electron back-scattered diffraction (EBSD) were then employed to characterize the transformations of the microstructure, grain size, and orientation degree of the films. The results indicated that the degree of (111)-preferred orientation and grain size significantly decrease with increasing the current density. The nt-Cu films with a higher degree of (111)-preferred orientation and larger grains exhibit the slower rates of stress relaxation. The film with larger grains possesses a smaller grain boundary area; thus, the grain boundary diffusion for the thermal-stress release is suppressed. In addition, the induced tensile stress in the films with larger grains is smaller leading to the difference in microstructural changes under annealing.

In this study, the failure mechanisms of Cu-Cu joints under thermal cycling were investigated. Two structures of dielectrics (PBO/underfill/PBO and SiO₂) were employed to seal the joints. Stress gradients induced in the joints with the different dielectrics were simulated using a finite element method (FEM) and correlated with experimental observations. We found that interfacial voids were forced to move in the direction from high stress regions to low stress ones. The locations of migrated voids varied with the dielectric structures. Under thermal cycling, such voids were likely to move forward to the regions with a small stress change. They relocated and merged with their neighboring voids to lower the interfacial energy.

In this study, symmetrical solder joints (Cu/Ni/SnAg_2.3/Ni/Cu) were fabricated. They were electromigration (EM)-stressed at high (8 $\times$ 10⁴ A/cm²) or low (1.6 $\times$ 10⁴ A/cm²) current densities. Failures in the solder joints with different grain orientations under EM stressing were then characterized. Results show that Ni under-bump-metallurgy (UBM) was quickly dissolved into the solder joints possessing low angles between Sn c-axis and electron direction and massive NiCuSn intermetallic compounds formed in the Sn matrix. The diffusion rate of Ni increased with decreasing orientation grain angle. A theoretical model was also established to analyze the consumption rate of Ni UBM. Good agreement between the modeling and experimental results was obtained. Additionally, we found that voids were more likely to form in the solder joints under high EM stressing.