One way to achieve the best in class reliability is the implementation of a Design for Reliability methodology into the design process in order to estimate the lifetime of each individual critical component, based on proper reliability models for failure modes. The main drawback of above-mentioned approach is that it is relying on handbook-based reliability models, which usually are accurate only for particular components. This fact causes a necessity to develop a testing procedure for SiC power MOSFET, to determine its reliability model parameters. Such model could be further implemented in the Design for Reliability methodology for high performance power supplies design process. In this paper, a cost effective and industrial friendly laboratory setup for Active Power Cycling of SiC power MOSFETs in SOT-227b housing is presented. By this example, various control strategies for accelerated lifetime testing, degradation indicators for wear out condition monitoring and junction temperature estimation methods are compared on their impact on test results and complexity in either laboratory setup and its maintenance procedure. Technical issues related to start up of Active Power Cycling test and failure detection algorithm are discussed. At last, test results for SiC power MOSFETs subjected to over 63355 power cycles are presented.

Integrated circuits, flat panel displays, solar panels, architectural glass, high resolution camera and many other products are landmarks of the $21^{st}$ century. All of these different everyday objects have one thing in common - they are manufactured using plasma processing techniques. The aim of this paper is to introduce this silent hero of modern industry, to a broader audience. An evaluation is made of common types of power converters within the scope of plasma processing applications, while the key requirements and future challenges for such power supplies are discussed.

This paper focuses on two key technical concepts, which may have a tremendous impact on future generations of power electronic converters: the Power Electronic Building Block (PEBB) concept, and the 5G/6G wireless data transfer. It is expected that these two trends may induce development of new cognitive of power electronic converters: Power Electronics 4.0. To investigate this concept, a Proof of Concept (PoC) of PEBB-based power converter integrated with a 5G network, was designed and tested. Study confirmed that power converter assembled from PEBB modules can compete with state-of-the-art devices. Moreover, test results indicates that several challenges related to PEBB and integration of power electronic equipment with 5G network has to be resolved, to enable growth of augmented power electronic converters, especially if wireless data transfer is meant for communication between PEBB modules.

The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.

The increasing presence of power electronic converters in the modern world – from electric vehicles, up to industrial applications – brings up concerns about their reliability, especially in the case of the Wide Band-Gap (WBG) devices. Moreover, ensuring high reliability becomes more challenging due to constantly increasing focus on the development of new types of power supplies in a shorter time. Thus, research over reliability improvement of modern power converters was initiated. In this paper, a concept of Design For Reliability (DfR) procedure, suitable for projects with a short lifespan, and a case study of Power Electronic Building Block (PEBB) designed according to the proposed procedure are presented. Furthermore, a Reliability Oriented Control (ROC) algorithm for WBG-based converters is discussed.

Nowadays, end users of power electronic converters require not only the best quality, excellent performance and high efficiency, but also, as the most important parameter, reliability [1]. In the case of power semiconductors, a very essential element of each power converter, the main stressor is junction temperature (maximum value and amplitude of temperature swing), since it greatly accelerates degradation mechanisms, which significantly reduces device lifetime [2]. These facts lead to the obvious conclusion that the temperature of power semiconductors should be measured during start-up and qualification testing of newly developed power supplies, to assess stress levels to which these critical components are subjected. In the case of power supplies operating at high power levels $(30_120 kW)$ and high frequencies $(4_13.56 {MHz})$ even simple temperature measurement becomes a challenge [3]. This paper presents the design process of a robust data logging system, immune to the presence of a heavily distorted electromagnetic field, and its performance in comparison to commercial solutions.