A non-iterative method is presented to accurately extract the five parameters of single diode model of solar cells in this paper. This method overcomes the problems of complexity and accuracy by simplifying the calculation process. Key parts of the equation are to be adjusted dynamically so that the desired five parameters can be obtained from the I-V curve. Then, the I-V and P-V characteristic curves of solar cells are used to compare the effectiveness of this method with other methods. Furthermore, the root mean square error analysis shows that this method is more applicable than other methods. Finally, the I-V and P-V characteristics simulated by using the extracted parameters in this method are compared and discussed with the experimental data of solar cells under different conditions. In fact, this extraction process can be regarded as an effective and accurate method to estimate solar cells’ single diode model parameters.

An analytical surface-potential-based drain current model for amorphous indium–gallium–zinc–oxide (a-InGaZnO) thin film transistors (TFTs) is proposed by introducing an effective charge density approach in this paper. This approach gives two initial approximate values of the effective state density and the effective thermal voltage by using the dominant state of the free charge density in total charge density, and then obtains a high-precision one-exponent equivalent transformation for three-exponent total charge density. Based on this approach, we have solved the problem that the physical meaning of the transition area in the regional method is not clear and a one-piece analytical surface potential solution to Poisson’s equation is successfully derived. Furthermore, the drain current is also explicitly derived from the charge sheet model and I-V characteristics of a-InGaZnO TFTs are reproduced from the above obtained model. Finally, accurate and effective surface-potential model and drain current model are obtained and verified by experimental data, respectively. Good verification results prove that the proposed model could become an accurate and suitable tool for being embedded into a circuit simulation.

In this paper, the resistance degradation behaviors of double trench (DT) and asymmetric trench (AT) SiC MOSFETs under total ionizing dose (TID) effect and high drain voltage bias are investigated in detail. The output characteristics measurement results before and after irradiation indicate that the TID effect with high drain voltage bias increases the drain current, resulting in the On-state resistance degradation, whereas the high drain voltage bias seems to have no impact on the degradation. In particular, the DT SiC MOSFETs demonstrate a greater degree of degradation in comparison to the AT SiC MOSFETs under the same gate voltage. This phenomenon can be attributed to a more pronounced decline in channel resistance. Simultaneously, the threshold voltage ( V _TH ), the drain leakage current ( I _DSS ), and the gate leakage current ( I _GSS ) are also measured, which can be concluded that the resistance degradation is attributable to the V _TH negative shifting induced by the positive charge accumulation in the gate oxide. Furthermore, the AT SiC MOSFETs have better irradiation tolerance owing to the P-shield asymmetric trench structure, exhibiting slight shift in the V _TH , the I _DSS , and the I _GSS . Finally, the TCAD simulations are utilized to successfully verify the degradation mechanism.

Many thin film transistor (TFT) models that consider the free and trapped charges, including models for amorphous InGaZnO (a-IGZO) TFTs, rely on the accurate determination of surface potential. In this work, a physically-based initial solution and fast-converging iterative procedure with logarithmic increment are utilized for the precise determination of the surface potential model in TFTs with channels of noncrystalline semiconductors, which have exponentially distributed tails and deep traps in the semiconductors. In particular, the surface potential model does not use special functions, such as the Lambert $W$ function. The precision of the proposed scheme of analytical model and iterative procedure is verified against reference simulations of surface potential, and against measured current–voltage DC characteristics of a-IGZO TFTs, employing a well-established surface-potential-based charge sheet model. The precision of the iterative procedure is in the range of few nV, converging approximately for less than half of the number of iterations of other schemes for the calculation of the surface potential. Accordingly, the proposed analytical model for surface potential and the iterative scheme for the determination of the values of the surface potential are suitable for implementation in TFTs’ circuit simulators.

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