Hysteresis in organic field-effect transistors is attributed to the well-known bias stress effects. This is a phenomenon in which the measured drain-source current varies when sweeping the gate voltage from on to off or from off to on. Hysteresis is caused by various factors, and one of the most common is charge trapping. A charge trap is a defect that occurs in an interface state or part of a semiconductor, and it refers to an electronic state that appears distributed in the semiconductor’s energy band gap. Extensive research has been conducted recently on obtaining a better understanding of charge traps for hysteresis. However, it is still difficult to accurately measure or characterize them, and their effects on the hysteresis of organic transistors remain largely unknown. In this study, we conduct a literature survey on the hysteresis caused by charge traps from various perspectives. We first analyze the driving principle of organic transistors and introduce various types of hysteresis. Subsequently, we analyze charge traps and determine their influence on hysteresis. In particular, we analyze various estimation models for the traps and the dynamics of the hysteresis generated through these traps. Lastly, we conclude this study by explaining the causal inference approach, which is a machine learning technique typically used for current data analysis, and its implementation for the quantitative analysis of the causal relationship between the hysteresis and the traps.

Electronic memory devices, such as memristors, charge trap memory, and floating-gate memory, have been developed over the last decade. The use of polymers in electronic memory devices enables new opportunities, including easy-to-fabricate processes, mechanical flexibility, and neuromorphic applications. This review revisits recent efforts on polymer-based electronic memory developments. The versatile contributions of polymers for emerging memory devices are classified, providing a timely overview of such unconventional functionalities with a strong emphasis on the merits of polymer utilization. Furthermore, this review discusses the opportunities and challenges of polymer-based memory devices with respect to their device performance and stability for practical applications.