Hocheon Yoo

Prof. Dr. Hocheon Yoo

The SDC Research Lab, Department of Electronic Engineering, Gachon University, 1342 Seongnam-daero, Seongnam 13120, Korea
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Research Focus & Metrics

Academic Career Length

7Years (2020-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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11 June 2021 in Nature Communications
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SHSeongin Hong
Seongin Hong
NZNicolò Zagni
Nicolò Zagni
SCSooho Choo
Sooho Choo
NLNa Liu
Na Liu
SBSeungho Baek
Seungho Baek
SKSunkook Kim
Sunkook Kim
Various large-area growth methods for two-dimensional transition metal dichalcogenides have been developed recently for future electronic and photonic applications. However, they have not yet been employed for synthesizing active pixel image sensors. Here, we report on an active pixel image sensor array with a bilayer MoS2 film prepared via a two-step large-area growth method. The active pixel of image sensor is composed of 2D MoS2 switching transistors and 2D MoS2 phototransistors. The maximum photoresponsivity (Rph) of the bilayer MoS2 phototransistors in an 8 × 8 active pixel image sensor array is statistically measured as high as 119.16 A W−1. With the aid of computational modeling, we find that the main mechanism for the high Rph of the bilayer MoS2 phototransistor is a photo-gating effect by the holes trapped at subgap states. The image-sensing characteristics of the bilayer MoS2 active pixel image sensor array are successfully investigated using light stencil projection.

24 March 2021 in Nanomaterials
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Hocheon YooHocheon Yoo
Hocheon Yoo
KHKeun Heo
Keun Heo
HAHasan Raza Ansari
Hasan Raza Ansari
Seongjae ChoSeongjae Cho
Seongjae Cho
Two-dimensional materials have garnered interest from the perspectives of physics, materials, and applied electronics owing to their outstanding physical and chemical properties. Advances in exfoliation and synthesis technologies have enabled preparation and electrical characterization of various atomically thin films of semiconductor transition metal dichalcogenides (TMDs). Their two-dimensional structures and electromagnetic spectra coupled to bandgaps in the visible region indicate their suitability for digital electronics and optoelectronics. To further expand the potential applications of these two-dimensional semiconductor materials, technologies capable of precisely controlling the electrical properties of the material are essential. Doping has been traditionally used to effectively change the electrical and electronic properties of materials through relatively simple processes. To change the electrical properties, substances that can donate or remove electrons are added. Doping of atomically thin two-dimensional semiconductor materials is similar to that used for silicon but has a slightly different mechanism. Three main methods with different characteristics and slightly different principles are generally used. This review presents an overview of various advanced doping techniques based on the substitutional, chemical, and charge transfer molecular doping strategies of graphene and TMDs, which are the representative 2D semiconductor materials.

28 April 2022 in Nature Communications
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JCJunhwan Choi
Junhwan Choi
CLChanghyeon Lee
Changhyeon Lee
CLChungryeol Lee
Chungryeol Lee
HPHongkeun Park
Hongkeun Park
SLSeung Min Lee
Seung Min Lee
SISung Gap Im
Sung Gap Im
Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter fulfills all the important requirements such as full-swing operation, optimum intermediate logic value (~VDD/2), high DC gain exceeding 20 V/V as well as low-voltage operation (< 5 V). The organic flash memory exhibits long retention characteristics (current change less than 10% after 104 s), leading to the long-term stability of the 3D T-inverter. We believe the 3D T-inverter employing flash memory developed in this study can provide a useful insight to achieve high-performance MVL circuits.

17 February 2021 in Journal of Materials Chemistry C
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Hocheon YooHocheon Yoo
Hocheon Yoo
Chang-Hyun KimChang-Hyun Kim
Chang-Hyun Kim
New materials and device approaches to multi-valued logic systems are introduced.

4 February 2022 in Coatings
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YJYunchae Jeon
Yunchae Jeon
DLDong Hyun Lee
Dong Hyun Lee
Hocheon YooHocheon Yoo
Hocheon Yoo
Thin-film transistors using metal oxides have been investigated extensively because of their high transparency, large area, and mass production of metal oxide semiconductors. Compatibility with conventional semiconductor processes, such as photolithography of the metal oxide offers the possibility to develop integrated circuits on a larger scale. In addition, combinations with other materials have enabled the development of sensor applications or neuromorphic devices in recent years. Here, this paper provides a timely overview of metal-oxide-based thin-film transistors focusing on emerging applications, including flexible/stretchable devices, integrated circuits, biosensors, and neuromorphic devices. This overview also revisits recent efforts on metal oxide-based thin-film transistors developed with high compatibility for integration to newly reported applications.

23 June 2023 in Nature Communications
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CLChungryeol Lee
Chungryeol Lee
CLChanghyeon Lee
Changhyeon Lee
SLSeungmin Lee
Seungmin Lee
JCJunhwan Choi
Junhwan Choi
Hocheon YooHocheon Yoo
Hocheon Yoo
SISung Gap Im
Sung Gap Im
A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate. In the H-MTR, a reliable transition between N-shaped transfer curves with distinct NTC and monolithically current-increasing transfer curves without apparent NTC can be accomplished through programming operation. Based on the H-MTR, a binary/ternary reconfigurable logic inverter (R-inverter) has been successfully implemented, which showed an unprecedentedly high static noise margin of 85% for binary logic operation and 59% for ternary logic operation, as well as long-term stability and outstanding cycle endurance. Furthermore, a ternary/binary dynamic logic conversion-in-memory has been demonstrated using a serially-connected R-inverter chain. The ternary/binary dynamic logic conversion-in-memory could generate three different output logic sequences for the same input signal in three logic levels, which is a new logic computing method that has never been presented before.