A 27-42-GHz 5-bit passive switching phase shifter is presented using 65-nm CMOS technology for the fifth generation (5G) applications. In the 180° phase shift bit, a reflection-type-based biphase modulator topology is developed to achieve good phase shifting performance over a wide bandwidth. The measured insertion loss (IL) of all 32 states is 12.4 ± 1.2 dB at 39 GHz and 11.4 ± 2.3 dB at 28 GHz with zero dc power. The phase shifter demonstrates an ultralow root mean square (rms) phase error of 0.7° and a low rms amplitude error of 0.8 dB at 37 GHz with an inherent digital phase-control mechanism. The rms phase error is less than 3.8° and the rms amplitude error is less than 2.1 dB from 27 to 42 GHz.

A radial multiway power divider is used to distribute microwave signals to the next stages located radially around all directions. It has been a challenging task to implement a radial multiway power divider on a planar circuit board without sacrificing the bandwidth performance. In this letter, a radial four-way power divider with the proposed isolation network is presented. The isolation network, composed of several combined RLC and LC networks, plays the crucial role of making the radial layout style easy to realize, and meanwhile improves the output matching and port-to-port isolation. The background principle of the proposed topology and the guideline of designing the isolation network are provided. The fabricated radial four-way power divider results in the measured -20-dB output matching and isolation bandwidths as large as 35% and 65%, respectively, exhibiting the best bandwidth performance among all the published radial power dividers of the same type.

A 28 GHz 5‐bit switch‐type phase shifter (STPS) using 0.18 μm CMOS technology is presented for 5G mobile communication applications. Utilising a process variation insensitive transmission line‐based bridged T‐type topology for 11.25°, 22.5°, 45°, 90° 1‐bit phase shifters and high‐pass/low‐pass network switched‐path‐type topology for 180° 1‐bit phase shifter, the 5‐bit STPS achieves ultra‐low root mean square (RMS) phase error of 1.7° and low RMS amplitude error of 0.59 dB at 28 GHz with intrinsic digital phase‐control mechanism. The measured insertion loss of all 32 states is 15 ± 1.5 dB at 28 GHz with zero dc consumption.

An X-band half-watt fully integrated power amplifier (PA) using standard 0.18-μm 1P6M CMOS technology is presented in this letter. Utilizing an interweaved three-primary parallel combining transformer, the CMOS PA delivers 27.1 dBm of measured saturation output power (Psat) with 22.7% of power-added efficiency at 9 GHz from a 3.3-V power supply. The measured output 1-dB gain compression point (OP1 dB) is 24.2 dBm and the gain performance is 11.2 dB at 9 GHz. The chip size is 1.045 × 0.84 mm ² . To the best of our knowledge, the PA is the first half-watt CMOS PA with excellent power density at the X-band.

This letter presents a broadband digital-controlled variable gain amplifier (VGA) on 65-nm CMOS process. A body-biased digital current-steering topology is proposed to enlarge the gain control range (GCR) of the VGA under low supply voltage. For phased-array applications, a phase compensation network is added to minimize the phase shift during the gain tuning. The proposed VGA achieves a small-signal gain of 16.3/16.1 dB at 28/38 GHz with a 3-dB gain bandwidth from 25.5 to 46 GHz. The measured phase variation is 2.32 $^{\circ}$ /4.8 $^{\circ}$ with a GCR of 8.7/8.4 dB at 28/38 GHz. The phase variation of the VGA is less than 5 $^{\circ}$ and the rms phase error is less than 1.46 $^{\circ}$ over a wide frequency band of 27–43 GHz covering multiple 5G bands.