Oxide semiconductors have been extensively studied as active channel layers of thin-film transistors (TFTs) for electronic applications. However, the field-effect mobility (μ_FE) of oxide TFTs is not sufficiently high to compete with that of low-temperature-processed polycrystalline-Si TFTs (50–100 cm²V⁻¹s⁻¹). Here, we propose a simple process to obtain high-performance TFTs, namely hydrogenated polycrystalline In₂O₃ (In₂O₃:H) TFTs grown via the low-temperature solid-phase crystallization (SPC) process. In₂O₃:H TFTs fabricated at 300 °C exhibit superior switching properties with µ_FE = 139.2 cm²V⁻¹s⁻¹, a subthreshold swing of 0.19 Vdec⁻¹, and a threshold voltage of 0.2 V. The hydrogen introduced during sputter deposition plays an important role in enlarging the grain size and decreasing the subgap defects in SPC-prepared In₂O₃:H. The proposed method does not require any additional expensive equipment and/or change in the conventional oxide TFT fabrication process. We believe these SPC-grown In₂O₃:H TFTs have a great potential for use in future transparent or flexible electronics applications.

Heterojunction channel engineering is discussed as a means of enhancing the performance and bias stress stability of In–Ga–Zn–O thin-film transistors (IGZO TFTs). A heterojunction channel was formed by depositing In-rich IGZO on IGZO111 with an atomic ratio of In:Ga:Zn=1:1:1, whose energy band lineup was type-II with a potential well of 0.4 eV for electrons. The thickness of the bottom IGZO111 layer strongly affected the field-effect mobility ( μ _FE ) of the TFT owing to electron confinement effect at the heterojunction interface. μ _FE was enhanced from 12.4 cm ² V ⁻¹ s ⁻¹ for homogeneous IGZO111 TFT to 24.7 cm ² V ⁻¹ s ⁻¹ for the heterojunction TFT. Device simulation results revealed that electron confinement in the heterojunction channel played an important role in determining μ _FE in the TFT. A channel engineering approach will provide a method of overcoming the trade-off between μ _FE and the positive-bias stress stability of oxide TFTs.

The electrical properties, carrier generation mechanism, and origin of subgap states in Ar- and He-plasma-treated In–Ga–Zn–O (IGZO) films were investigated. The incident ion energy was varied by applying a substrate bias power (P_B). The sheet carrier concentration of plasma-treated IGZO films increased with increasing P_B. The carrier generation mechanism and origin of subgap states were investigated by X-ray photoelectron spectroscopy (XPS) with CrKα (5415 eV) and AlKα (1487 eV) sources. The XPS analysis revealed that oxygen vacancies (V_O) increased with increasing P_B. As the V_Oincreased, subgap states were formed near valence band maximum (near-VBM) in the He-plasma-treated IGZO films. On the other hand, we found the formation of metallic In (In⁰) and Zn (Zn⁰) states at a surface of the Ar-plasma-treated IGZO, and the V_O in the Ar-plasma-treated IGZO film was much lower than that in the He-plasma-treated film. The subgap states in Ar-plasma-treated IGZO film would be originated from In⁰ and Zn⁰ states. We also demonstrated a self-aligned IGZO thin-film transistor with the S/D regions formed by the plasma treatment with P_B. An appropriate P_B significantly reduced a series resistance of the S/D regions and improved the TFT properties after post-annealing at 350°C.

We fabricated top-gate and self-aligned indium- gallium-zinc-oxide thin-film transistors (IGZO TFTs) at a maximum process temperature of 150 °C using a coatable organic gate insulator (OGI). By forming a damage and contaminationfree interface between the IGZO channel and OGI, and forming low-resistive source/drain regions by Al reaction method, we achieved good TFT properties, such as field effect mobility of 9.8 cm ² /Vs, subthreshold swing of 0.21 V/decade, and hysteresis of 0.3 V, with minimizing a parasitic capacitance. Although the TFT showed an abnormal degradation behavior under positive gate bias stress testing in an ambient air, it was suppressed by forming an additional organic passivation layer.