We report on achieving high-performance β-Ga ₂ O ₃ power devices through the incorporation of the p-type NiO _x . β-Ga ₂ O ₃ p-n heterojunction (HJ) diodes, as well as the novel p-n HJ gate (G) field-effect-transistors (HJ-FETs), have all demonstrated state-of-the-art Baliga's power figure of merit (P-FOM). The HJ p-n diode is introduced to provide a large built-in potential and alleviate the peak electric field to enhance the BV. The non-field plated p-n HJ diode and HJ-FET acquire a breakdown voltage (BV)/specific on-resistance (R _on,sp ) of 1220 V/1.08 mΩ · cm ² and 1115 V/3.19 mΩ ·cm ² , respectively. Therefore, the P-FOM which is defined as the BV ² /R _on,sp is yielded to be 1.38 GW/cm ² and 0.39 GW/cm ² for p-n HJ diode and HJ-FET, respectively. Due to the hard realization of p-type Ga ₂ O ₃ , these findings show significant insights on the development of Ga ₂ O ₃ power devices and offer great promises of implementing p-NiO _x in boosting the Ga ₂ O ₃ power device performances.

A GaN complementary field-effect transistor (FET) inverter monolithically integrated with power gate-injection high-electron-mobility transistors (HEMTs) was realized on a Si substrate. The GaN p-channel and n-channel logic devices and power devices were fabricated based on a p-GaN/AlGaN/GaN epi-structure. Through optimization of epi-layer thickness and doping, excellent low-level noise margin (NM _L ) of 1.47 V and high-level noise margin (NM _H ) of 0.98 V were achieved at a supply voltage ${V}_{\text {DD}}$ of 3 V at room temperature. A maximum current density ( ${I}_{\text {D,max}}$ ) of 0.36 mA/mm/220 mA/mm at ${V}_{\text {DS}}$ of −3 V/3 V and a threshold voltage ${V}_{\text {TH}}$ of −2.0 V/+2.3 V were achieved in the p-channel and n-channel FETs, respectively. A propagation delay of an inverter stage $\tau _{\text {pd}}$ in a ring oscillator was measured to be $1.67~\mu \text{s}$ . The power gate-injection HEMT has an ON-resistance ${R}_{ \mathrm{\scriptscriptstyle ON}}$ of $18.7~\Omega \cdot $ mm and a breakdown voltage (BV) of 900 V. These results show the great potential of the developed GaN complementary FET technology in the applications of GaN power modules.

In this letter, we demonstrated an AlN/GaN metal-insulator-semiconductor high electron mobility transistor (MISHEMT) on a Si substrate with in-situ SiN as gate dielectric with excellent mm-wave performance at low supply voltages. Benefited from the thin in-situ SiN, a low ohmic contact resistance ${R} _{C}$ of $0.2 \sf {\Omega } \cdot \text {mm}$ was obtained. The device with a T-shape gate featuring 80 nm gate foot length ( ${L} _{G}$ ) and 620 nm total gate metal thickness shows a maximum drain current ( ${I} _{D}$ ) of 1.95 A/mm, a peak transconductance ( ${g} _{\text {mmax}}$ ) of 500 mS/mm, and a cut-off frequency/a maximum oscillation frequency ( ${f} _{T}/{f} _{\text {max}}$ ) of 165/255 GHz. To the best of our knowledge, the ${f} _{T}$ and ${f} _{\text {max}}$ are the highest among the reported AlN/GaN transistors on Si substrates. 28 GHz load-pull measurements at low drain voltages of 3.5/5/6 V show maximum output power densities ( ${P} _{\text {out},\text {max}}$ ) of 0.36/0.73/1.04 W/mm and peak power-added efficiencies (PAE) of 40%/42%/43%, respectively. These excellent results show that AlN/GaN HEMTs on Si have a great potential for power amplifiers (PAs) in mobile mm-wave front-end applications.

In this letter, we report on demonstrating high-performance enhancement-mode (E-mode) ${p}$ -channel GaN Fin Field-Effect Transistors (FinFETs) fabricated on a proposed ${p}$ -GaN/AlN/AlGaN epitaxial structure with a low sheet resistance of 14 $\text{k}\Omega / {\unicode{0x25A1}} $ . Benefiting from the 25-nm-wide GaN nanowires channel and tri-gate architecture, high threshold voltage ( ${V}_{\text{TH}}$ ) of −2.2 V and low subthreshold swing ( SS ) of 130 mV/dec were obtained. Meanwhile, owing to the removal of etching damage in the recessed region and the post gate annealing, high drain current density of 18.5 mA/mm and high ${I}_{ \mathrm{\scriptscriptstyle ON}} / I_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of $3\times10$ ⁸ were acquired. The E-mode ${p}$ -channel GaN FinFET fabricated on the reformative epitaxial structure with lower sheet resistance shows the potential to be one step closer to realizing the vision of GaN CMOS technology.

In this letter, we demonstrated β-Ga ₂ O ₃ lateral Schottky barrier diodes (SBDs) with breakdown voltage (BV) over 10 kV via anode engineering techniques. Post-anode deposition annealing (PAA) was implemented to enhance the Schottky barrier height (SBH) to minimize the leakage current and suppress the interface state density (Dit) by over 1 order of magnitude. It is found that the Dit was extracted to be only 3×10 ¹⁰ cm ^-2 eV ^-1 at the energy level near the conduction band after the PAA treatment. Benefiting from the PAA and the coupled as well as the carefully designed dual field-plate (FP) structure, the BV of the SBD was enhanced from about 4 kV to over 10 kV while the turn-on voltage (V _on ) for those SBDs remained approximately at 1 V. These findings show the immense potential of anode engineered Ga ₂ O ₃ diodes for future high-voltage and high-power electronic systems.