This letter describes two improved 13-level inverters based on switched-capacitor. Compared with their original structure, which is published recently, one less high-voltage capacitor is required in the proposed inverters and the blocking voltage of their inverting half-bridge is reduced by half. In addition, the new inverters inherit various advantages of the original structure, such as a high boost factor of 6, self-balanced capacitor voltages, and reduced voltage ripples. Circuit description, operation principle, hybrid PWM modulation, and capacitor voltage ripples are analyzed and the feasibility of the proposed inverters is finally verified by experimental results.

To explore single-phase micro inverter with boosting ability, simple structure, low cost and high power density, a new structure of multilevel inverter (MLI) is proposed in this paper. With this structure, two half-bridge modular switched-capacitor circuits are arranged on both left- and right-sides of a dc source. Circuit configuration of this MLI can be bilaterally symmetrical and this benefits to modular design and voltage stress reduction of inverting bridges. Additionally, in order to reduce voltage ripple of capacitors and total harmonic distortion of output voltage simultaneously, a hybrid pulse width modulation strategy is developed to improve the performance of this MLI. As a result, capacitors of this MLI can be replenished repeatedly when they are taken as voltage sources to generate different voltage levels. Circuit configuration, operation principle, modulation, power loss and voltage ripple are analyzed in detail. Both simulation and experimental results are provided to demonstrate the effectiveness of the proposed MLI and modulation strategy.

Based on a hybrid technique of couple-inductor (CL) and switched-capacitor, a high step-up dc-dc converter is developed in this paper. It consists of one active switch, one CL, four diodes and four capacitors as well. The active switch withstands low voltage stress and all diodes’ voltage stresses do not exceed half of the output voltage. Simple structure and low voltage rated switches contribute to high efficiency of the proposed converter. The converter provides the ideal voltage gain of (2+2n)/(1-d), here n represents the turns’ ratio of the CL and d is the duty ratio. Its circuit configuration and operation principle are introduced. Effects of leakage inductance of the CL and parasitic resistance of components are analyzed in detail. Experimental results demonstrate the effectiveness of the proposed converter and the maximum efficiency is above 97%.

This article presents a new three-phase multilevel inverter with boosting capability for low-voltage applications like electric vehicles and renewable energy sources. This inverter is fed by a single dc voltage source and each phase involves two low-voltage transistors, two high-voltage transistors, two diodes, and two capacitors. Except that the two high-voltage transistors withstand twice the dc input voltage, all other components are rated to the dc input voltage. With phase-disposition pulsewidth modulation, the two types of high- and low-voltage transistors operate in low and high switching frequencies, respectively. This is very beneficial for reducing switching losses and selecting semiconductor switches. The two capacitors are connected in parallel and series alternately with the dc source resulting in high ac output voltage with multiple levels, self-balanced capacitor voltages as well as low voltage ripples. The topology, operation principle, capacitors' voltage ripples and power loss are analyzed in detail. Both simulation and experimental results are provided to demonstrate the feasibility of the proposed inverter.

This article analyzes a switched-capacitor-based seven-level inverter modulated by a hybrid of level- and phase-shifted pulsewidth modulation (PWM) algorithm in detail. The optimal design of circuit parameters is also presented to ensure this hybrid PWM algorithm gives full play to its advantages. The two capacitors employed in this inverter operate alternately in charging and discharging states at carriers' frequency of this PWM algorithm, to provide different output voltage levels. With reasonable parameter design as addressed in this article, both capacitors can be fully charged every time and the phenomenon of capacitors' voltage ripple accumulation existed in other works is no longer found in this seven-level inverter. All transistors employed in this inverter are switched under low switching stress, resulting in less switching loss. Both simulation and experimental results are provided to demonstrate the correctness of theoretical analysis, and the maximum measured efficiency is up to 96.4%.