Teleoperation in robotic embodiments allows operators to perform and program manipulation tasks with better accuracy, dexterity, and visualization than what is possible with traditional human–robot interaction paradigms. However, the perception of cues (e.g., egocentric distances) relevant to task execution, is known to be distorted in virtual environments due to many factors, which can be grouped into technical, human, and methodological categories. This phenomenon becomes more pronounced in a low-cost/encumbrance setup, where the dynamic environment is captured with color and depth (RGB-D) cameras and presented in a virtual environment. In this paper, the effects of augmented reality (AR) are evaluated as a tool to deliver additional information, which helps in overcoming the differences in perception between telepresence and actual presence. The AR feedback is used to improve the embodiment illusion and to guide the operator during task execution. The AR setup, comprising an RGB-D camera and a head-mounted display, is integrated with the Baxter robot and evaluated by involving 22 participants in an experiment while they execute a pick-and-place task, taking into account their expertise in AR/virtual reality (VR) and gaming. The use of AR results in enhancing the accuracy and efficiency of the task performance, besides significantly reducing the effect of the differences in skillfulness between the participants. Furthermore, it is found that the sense of presence and embodiment for the participant is positively affected by different types of AR.

Nowadays, two groundbreaking factors are emerging in neural networks. Firstly, there is the RISC-V open instruction set architecture (ISA) that allows a seamless implementation of custom instruction sets. Secondly, there are several novel formats for real number arithmetic. In this work, we combined these two key aspects using the very promising posit format, developing a light Posit Processing Unit. We present an extension of the base RISC-V ISA that allows the conversion between 8 or 16-bit posits and 32-bit IEEE Floats or fixed point formats in order to offer a compressed representation of real numbers with little-to-none accuracy degradation. Then we elaborate on the hardware and software toolchain integration of our PPU inside the Ariane RISC-V core and its toolchain, showing how little it impacts in terms of circuit complexity and power consumption. Indeed, only 0.36% of the circuit is devoted to the PPU while the full RISC-V core occupies the 33% of the overall circuit complexity. Finally we present the impact of our PPU-light on a deep neural network task, reporting speedups up to 10 on sample inference processing time.

This paper presents a vibrotactile methodology for a rowing training system. Since hands' trajectories are fundamental in the rowing gesture, it is completely necessary to search and develop new technologies and techniques that can interact and help the user to perform a better movement. These methodologies must be as natural as possible in order to guarantee the transparency in the feedback of the system. Therefore this paper presents an analysis of visual, visual-tactile and tactile training strategies to understand the importance in the order and the period of time when each one is applied. Data analysis shows the importance of combining visual and tactile feedbacks to obtain the best results in the improvements of the user skills.

The use of virtual environments (VE) for training sports is quite natural when considering strategic or cognitive aspects. Using VE for sensorimotor training is more challenging, in particular with the difficulty of transferring the task learned in the virtual world to the real. Of special concern for the successful transfer is the adequate combination of training experience protocols and the delivery modes of multimodal feedback. Analyzing feedback in terms of information exchange, this work discusses different feedback combinations and their application to virtual reality training of rowing skills.

With increasing real-time constraints being put on the use of Deep Neural Networks (DNNs) by real-time scenarios, there is the need to review information representation. A very challenging path is to employ an encoding that allows a fast processing and hardware-friendly representation of information. Among the proposed alternatives to the IEEE 754 standard regarding floating point representation of real numbers, the recently introduced Posit format has been theoretically proven to be really promising in satisfying the mentioned requirements. However, with the absence of proper hardware support for this novel type, this evaluation can be conducted only through a software emulation. While waiting for the widespread availability of the Posit Processing Units (the equivalent of the Floating Point Unit (FPU)), we can already exploit the Posit representation and the currently available Arithmetic-Logic Unit (ALU) to speed up DNNs by manipulating the low-level bit string representations of Posits. As a first step, in this paper, we present new arithmetic properties of the Posit number system with a focus on the configuration with 0 exponent bits. In particular, we propose a new class of Posit operators called L1 operators, which consists of fast and approximated versions of existing arithmetic operations or functions (e.g., hyperbolic tangent (TANH) and extended linear unit (ELU)) only using integer arithmetic. These operators introduce very interesting properties and results: (i) faster evaluation than the exact counterpart with a negligible accuracy degradation; (ii) an efficient ALU emulation of a number of Posits operations; and (iii) the possibility to vectorize operations in Posits, using existing ALU vectorized operations (such as the scalable vector extension of ARM CPUs or advanced vector extensions on Intel CPUs). As a second step, we test the proposed activation function on Posit-based DNNs, showing how 16-bit down to 10-bit Posits represent an exact replacement for 32-bit floats while 8-bit Posits could be an interesting alternative to 32-bit floats since their performances are a bit lower but their high speed and low storage properties are very appealing (leading to a lower bandwidth demand and more cache-friendly code). Finally, we point out how small Posits (i.e., up to 14 bits long) are very interesting while PPUs become widespread, since Posit operations can be tabulated in a very efficient way (see details in the text).