Jinsu Jeong received a BS degree and an MS degree in electrical engineering from Pohang University of Science and Technology (POSTECH), Republic of Korea, in 2017. He is currently pursuing a PhD in electrical engineering from POSTECH. His research interests include the DC/AC/transient characterization and simulation of multi-gate field-effect transistors (FinFETs, gate-all-around FETs, vertical FETs) and 3D-stacked CMOS using TSVs.