Aim to improve the power efficiency of the dual-active-bridge (DAB) DC-DC converter, an efficiency optimization scheme with triple-phase-shift (TPS) modulation using reinforcement learning (RL) is proposed in this paper. More specifically, the Q-learning algorithm, as a typical algorithm of the RL, is applied to train an agent offline to obtain an optimized modulation strategy, and then the trained agent provide control decision online in real-time manner for the DAB DC-DC converter according to the current operation environment. The main objective is to obtain the optimal phase-shift angles for the DAB DC-DC converter, which can achieve the maximum power efficiency by reducing the power losses. Moreover, all possible operation modes of the TPS modulation are considered during the offline training process of the Q-learning algorithm. Thus, the cumbersome process for selecting the optimal operation mode in the conventional schemes can be circumvented successfully. Based on these merits, the proposed efficiency optimization scheme using the RL can realize the excellent performances for the whole load conditions and voltage conversion ratios. Finally, a 1.2 KW prototyped is built, and the simulation and the experimental results demonstrate that the power efficiency can be improved by using the optimization scheme based on the RL.

DC–DC converters with high‐voltage gain and low‐input current ripple have attracted much attention in photovoltaic, fuel cells and other renewable energy system applications. Conventional boost–flyback converter can achieve high‐voltage set‐up ratio; however, its input current is pulsing and the voltage stress across output diode of flyback‐cell is high. In this study, by incorporating coupled‐inductor into the boost‐cell of boost–flyback converter, the voltage stress across the output diode is effectively reduced. Passive snubber circuit is utilised to suppress the voltage spike across power switch, low‐voltage‐rated metal–oxide semiconductor field effect transistor (MOSFET) with low R _{ds_on} can thus be used to reduce the conduction loss of power MOSFET. In addition, ripple‐free input current can be achieved, which makes the design of electromagnetic interference filter easy. Steady‐state characteristics of the proposed converter are analysed, and experimental results are given to verify the analysis results.

Dual active converter (DAB) can achieve high efficiency when the voltage ratio (the ratio of the input voltage to the output voltage equivalent to the primary side) is one, but when the voltage ratio is not one, the light-load efficiency drops sharply. Based on the realization logic of DAB light-load, this article proposes a modulation method with asymmetric compression duty cycle, which only increases one degree of freedom and does not need additional components to significantly improve the light-load efficiency. First, this article introduces the existing problems and solutions of the traditional scheme and puts forward a new modulation strategy. Then, the operating modes and power characteristics are analyzed. Then, the influence of duty cycle compression on reflux power and current stress is analyzed. Finally, a prototype with an input voltage of 100–200V, an output voltage of 50 V, and a full load power of 300–600 W is built to verify the analysis.

In this paper, the issue of open-switch faults of voltage source inverter (VSI) is studied, an adaptive fast voltage-based real-time open-switch fault location method is proposed. Firstly, for each switching period, the voltage deviation is calculated by the expected voltage and estimated actual voltage, they are obtained via the mixed logical dynamic model (MLDM) and measured currents, respectively. Then, the voltage deviation of each phase is employed as a fault variable. By this way, avoiding the use of additional hardware, and embedding easily in system. Furthermore, considering the impact of sampling error, parameter error, dead time, delay time, and transition time, the adaptive threshold is designed. Finally, simulations and experiments are executed to verify the effectiveness of the proposed method.

In this paper, a series-capacitor based interleaving Buck Power Factor Correction (PFC) converter is proposed, which the bus capacitance is operated at DCVM mode, and automatic power factor correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step down conversion ratio of the proposed converter is achieved, which only related to the switching frequency and circuit parameters. Therefore, high power factor can be obtained due to very narrow dead time of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of component devices. In addition, comparing with the traditional DCM PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis and parameter design principle are given in this paper. The analysis results show that the power factor (PF) and total harmonic distortion (THD) are also independent of the duty cycle. Finally, a 220Vac input, 60W/15V output experimental prototype is built to verify the validity of the theoretical analysis.