In this paper, an In_0.53Ga_0.47As electron–hole bilayer tunnel field-effect transistor (EHBTFET) with a dual-metal left-gate and an N⁺-pocket (DGNP-EHBTFET) is proposed and systematically studied by means of numerical simulation. Unlike traditional transverse EHBTFETs, the proposed DGNP-EHBTFET can improve device performance without sacrificing the chip density, and can simplify the manufacturing process. The introduction of the dual-metal left-gate and the N⁺-pocket can shift the point-tunneling junction and adjust the energy band and the electric field in it, aiming to substantially degrade the OFF-state current (I_OFF) and maintain good ON-state performance. Moreover, the line tunneling governed by the tunneling-gate and the right-gate can further regulate and control I_OFF. By optimizing various parameters related to the N⁺-pocket and the gate electrodes, DGNP-EHBTFET’s I_OFF is reduced by at least four orders of magnitude, it has a 75.1% decreased average subthreshold swing compared with other EHBTFETs, and it can maintain a high ON-state current. This design greatly promotes the application potential of EHBTFETs.

In this paper, a symmetric heterogate dopingless electron–hole bilayer tunnel field-effect transistor with a ferroelectric layer and a dielectric barrier layer (FBHD-EHBTFET) is proposed. FBHD-EHBTFET can not only avoid random doping fluctuation and high thermal budget caused by doping, but also solve the issue that conventional EHBTFETs are unable to use the self-alignment process during device manufacturing. The simultaneous introduction of the symmetric heterogate and dielectric barrier layer can significantly suppress off-state current (I _off). Ferroelectric material embedded in the gate dielectric layer can enhance electron tunneling, contributing to improving on-state current (I _on) and steepening average subthreshold swing (SS _avg). By optimizing various parameters related to the gate, ferroelectric layer, and dielectric barrier layer, FBHD-EHBTFET can obtain the I _off of 1.11 × 10^–18 A μm⁻¹, SS _avg of 12.5 mV/dec, and I _on of 2.59 × 10^–5 A μm⁻¹. Compared with other symmetric dopingless EHBTFETs, FBHD-EHBTFET can maintain high I _on while reducing its I _off by up to thirteen orders of magnitude and SS _avg by at least 51.2%. Moreover, investigation demonstrates that both interface fixed charge and interface trap can increase I _off, degrading the off-state performance of device. The study on FBHD-EHBTFET-based dynamic random access memory shows that it has the high read-to-current ratio of 1.1 × 10⁶, high sense margin of 0.42 μA μm⁻¹, and long retention time greater than 100 ms, demonstrating that it has great potential in low-power applications.

In this paper, a dual-metal gate In _0.53 Ga _0.47 As dopingless TFET with a platinum metal strip insertion (Pt-MSDG-TFET) is proposed and systematically investigated by using the numerical simulation. Different from that the hafnium metal strip directly reduces the lateral tunneling distance, the platinum metal strip shifts the tunneling junction toward the gate electrode, which obtains a smaller lateral tunneling distance through the applied gate voltage so as to more benefit the electron tunneling. Meanwhile, it makes the performance for Pt-MSDG-TFET more sensitive to the variation of tunneling gate workfunction (Φ _M4 ), so that better DC and RF performances can be obtained with the decrease of Φ _M4 . Moreover, the investigation on the misalignment of the metal strip contributes to give a direction for the practical feasibility of manufacturing. Research indicates that the proposed Pt-MSDG-TFET is a promising TFET for ultra-low power consumption RF application.

To give consideration to both chip density and device performance, an In_0.53Ga_0.47As vertical electron–hole bilayer tunnel field effect transistor (EHBTFET) with a P⁺-pocket and an In_0.52Al_0.48As-block (VPB-EHBTFET) is introduced and systematically studied by TCAD simulation. The introduction of the P⁺-pocket can reduce the line tunneling distance, thereby enhancing the on-state current. This can also effectively address the challenge of forming a hole inversion layer in an undoped InGaAs channel during device fabrication. Moreover, the point tunneling can be significantly suppressed by the In_0.52Al_0.48As-block, resulting in a substantial decrease in the off-state current. By optimizing the width and doping concentration of the P⁺-pocket as well as the length and width of the In_0.52Al_0.48As-block, VPB-EHBTFET can obtain an off-state current of 1.83 × 10⁻¹⁹ A/μm, on-state current of 1.04 × 10⁻⁴ A/μm, and an average subthreshold swing of 5.5 mV/dec. Compared with traditional InGaAs vertical EHBTFET, the proposed VPB-EHBTFET has a three orders of magnitude decrease in the off-state current, about six times increase in the on-state current, 81.8% reduction in the average subthreshold swing, and stronger inhibitory ability on the drain-induced barrier-lowering effect (7.5 mV/V); these benefits enhance the practical application of EHBTFETs.