Al alloying/doping in HfO₂-based resistive random-access memory (RRAM) has been proven to be an effective method for improving the low-resistance state (LRS) retention. However, a detailed understanding of Al concentration on oxygen vacancy migration and resistive switching (RS) behaviors still needs to be included. Herein, the impact of Al concentration on the RS properties of the TiN/Ti/HfAlO/TiN RRAM devices is addressed. Firstly, it is found that the forming voltage, SET voltage, and RESET voltage can be regulated by varying the Al doping concentration. Moreover, we have demonstrated that the device with 15% Al shows the minimum cycle-to-cycle variability (CCV) and superior endurance (over 10⁶). According to density-functional theory (DFT) calculations, it is found that the increased operation voltage, improved uniformity, and improved endurance are attributed to the elevated migration barrier of oxygen vacancy through Al doping. In addition, LRS retention characteristics of the TiN/Ti/HfAlO/TiN devices with different Al concentrations are compared. It is observed that the LRS retention is greatly enhanced due to the suppressed lateral diffusion process of oxygen vacancy through Al doping. This study demonstrates that Al alloying/doping greatly affects the RS behaviors of HfO₂-based RRAM and provides a feasible way to improve the RS properties through changing the Al concentration.

A trade-off between the memory window and the endurance exists for transition-metal-oxide RRAM. In this work, we demonstrated that HfO_x/Ge-based metal-insulator-semiconductor RRAM devices possess both a larger memory window and longer endurance compared with metal-insulator-metal (MIM) RRAM devices. Under DC cycling, HfO_x/Ge devices exhibit a 100× larger memory window compared to HfO_x MIM devices, and a DC sweep of up to 20,000 cycles was achieved with the devices. The devices also realize low static power down to 1 nW as FPGA’s pull-up/pull-down resistors. Thus, HfO_x/Ge devices act as a promising candidates for various applications such as FPGA or compute-in-memory, in which both a high ON/OFF ratio and decent endurance are required.

Ferroelectric hafnium and zirconium oxides have recently garnered significant attention due to their potential applications in in-memory computing. In this study, we present an optimized process design for a wake-up free 15 nm thick Hf_0.5Zr_0.5O₂ (HZO) ferroelectric capacitor by fine-tuning the dual-oxygen process and incorporating oxygen annealing after post-metallization annealing (PMA). The optimized approach resulted in a competitive polarization of 28.6 μC/cm², consistently exceeding 25 μC/cm² at 3 V after 2 × 10⁷ cycles, showcasing a current density of 3.2 mA/cm² at 2 V after 10⁵ cycles. The synergistic effect of oxygen vacancies and grain properties (grain size, phase proportion) enables competitive ferroelectric polarization at lower voltages, while the generation of WO_x near the top electrode and increased grain size further ensure the reliability of the HZO ferroelectric capacitor. This work presents innovative perspectives for the development of non-volatile devices characterized by low leakage current and low power consumption.

Flexible Si-based Hf_0.5Zr_0.5O₂ (HZO) ferroelectric devices exhibit numerous advantages in the internet of things (IoT) and edge computing due to their low-power operation, superior scalability, excellent CMOS compatibility, and light weight. However, limited by the brittleness of Si, defects are easily induced in ferroelectric thin films, leading to ferroelectricity degradation and a decrease in bending limit. Thus, a solution involving the addition of an ultra-thin Al buffer layer on the back of the device is proposed to enhance the bending limit and preserve ferroelectric performance. The device equipped with an Al buffer layer exhibits a 2Pr value of 29.5 μC/cm² (25.1 μC/cm²) at an outward (inward) bending radius of 5 mm, and it experiences a decrease to 22.1 μC/cm² (16.8 μC/cm²), even after 6000 bending cycles at a 12 mm outward (inward) radius. This outstanding performance can be attributed to the additional stress generated by the dense Al buffer layer, which is transmitted to the Si substrate and reduces the bending stress on the Si substrate. Notably, the diminished bending stress leads to a reduced crack growth in ferroelectric devices. This work will be beneficial for the development of flexible Si-based ferroelectric devices with high durability, fatigue resistance, and functional mobility.