The crosstalk voltage on the gate source terminal of SiC power MOSFETs in a phase leg circuit is composed of the gate-drain capacitor introduced voltage and the common source inductor introduced voltage. The mathematical model of the crosstalk voltage indicates that to suppress two types of crosstalk voltage, there exists a contradictory requirement on the off-state gate loop impedance. This challenge reduces the effectiveness of conventional crosstalk elimination methods. As an improvement, a crosstalk voltage suppression circuit that synchronously eliminates the crosstalk voltage of gate-drain capacitance and the common source inductance is proposed. In this work, instead of creating low impedance gate loop in the off state, a high impedance gate loop is formatted to eliminate the voltage drop on the common source inductance. Meanwhile the potential false turn-on or the negative voltage spikes caused by gate-drain capacitance is eliminated by the pre-charge voltage in the gate source capacitor. The required pre-stored charge is analyzed considering the nonlinear behavior of the junction capacitance of the SiC MOSFETs. The proposed gate driver is experimentally verified in different switching conditions.

Nowadays, due to the growing demands of data centers, the traditional line frequency transformer based data center power distribution system is becoming bulky and inefficient. Although SST based DC-PDS dramatically improves the system efficiency, the traditional multi-cell SST with input-series output-parallel (ISOP) architectures has limitations. Using high voltage devices to develop single-cell SST improves system performance, however, its application is limited by high voltage power devices. As an alternative solution, achieving high blocking voltage through the series connection of low voltage devices brings several advantages. Nevertheless, the series connection brings about voltage imbalance and switching loss increment problems. This paper proposes a medium voltage series resonant converter with series-connected SiC MOSFETs. By adding snubber capacitors to each SiC MOSFET and working at LLC resonant soft-switching mode, the voltage imbalance is reduced and switching loss is decreased. Then the analytical model of MVSRC is established. Moreover, the voltage imbalance model is established and the voltage imbalance sensitivity is defined to guide the snubber parameter selections. Afterward a design example of the 99% efficient 5kV/400V prototype is presented. Lastly, the experimental results verify the validity of proposed methods and the accuracy of analysis.

Medium-voltage high-speed drive is promising in applications, such as the centrifugal compressors and electrified transportation. However, it raises lots of design challenges for the converters, which drive the motors. A SiC and Si hybrid ANPC converter is developed to address these challenges. In this article, the essence of this hybrid structure is investigated to clearly show the derivation process of the hybrid active neutral-point-clamped (ANPC) converter and inspire future research on these hybrid topologies. A dedicated space vector modulation (SVM) scheme is proposed for the hybrid ANPC converter, which enables the three-phase hybrid ANPC converter operating with SiC mosfets in high frequency and Si IGBTs in fundamental frequency. A neutral point (NP) voltage balancing scheme is added to the SVM scheme to balance the NP voltage imbalance under low-frequency modulation index. All these efforts make the hybrid ANPC converter become a high power density and fairly low-cost solution. A 400 Hz fundamental frequency, 3.6 kHz switching frequency, medium-voltage high-speed drive system is assumed and tested by the scaled-down experimental results. The effectiveness of the proposed SVM and NP voltage balancing method have both been verified.

Series connection of SiC power MOSFET is an attractive approach to expand the blocking voltage of SiC devices, whereas the dynamic voltage balancing among the series-connected devices is the most critical challenge of the technique. In this article, a simple, fast, and cost-effective dynamic voltage balancing circuit of the series-connected SiC MOSFETs is proposed to suppress the voltage imbalance among the devices. The proposed circuit is composed of a resistor-capacitor (RC) snubber with a coupled inductor to effectively sense the voltage imbalance and add a compensated signal to the gate driving voltage. In the article, the operation principle of the proposed method is described in detail and the parameter selection of the circuit is given. Then the optimized layout of the circuit in a typical half-bridge SiC power module is proposed to reduce the stray parameters introduced by the coupled inductor effectively. The proposed method is verified by experiments under different conditions. Compared with a purely RC snubber balancing strategy, the capacitor can be significantly reduced. Since only passive components are required in the feedback loop, the proposed method demonstrates a reliable and straightforward approach to achieve equal voltage sharing of the series-connected devices.

In this paper, a unified equivalent circuit model which can simplify the design and analysis of a family of high voltage (HV) generation architectures based on the series-parallel (LCC) resonant converter is proposed. Firstly, four HV generation architectures are reviewed in terms of the modularization level of HV transformers and rectifiers. Next, the unified equivalent resistor and capacitor (RC) model which can be easily embedded into the resonant tank to replace the complex HV transformers and rectifiers is derived. The generic model can be applied to different architectures, voltage multiplier topologies, stage and polarities number. Further analysis of the power factor of the resonant tank, the voltage gain and electrical stresses of power components is achieved with the derived equivalent circuit model. Subsequently, a comprehensive design methodology considering the power factor, conduction angle and quality factor is presented, which leads to low electrical stresses on the components and high efficiency. Furthermore, the parameter selection constraint based on the power factor, conduction angle and quality factor is derived. Finally, the proposed unified equivalent model and design methodology are validated by the experimental results of a 250V input, 20kV output 500W HV generator hardware prototype with distributed transformers and voltage multipliers.