Uvais Mustafa

Mr. Uvais Mustafa

Electrical and Electronics Engineering, University of Nottingham, Nottingham, UK
orcid

Research Focus & Metrics

Academic Career Length

10Years (2017-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 May 2021 in IEEE Access
Verified
Journal Article
Open access
M SAAD BIN ARIFM SAAD BIN ARIF
M SAAD BIN ARIF
UMUvais Mustafa
Uvais Mustafa
Shahrin Md AyobShahrin Md Ayob
Shahrin Md Ayob
Jose RodriguezJose Rodriguez
Jose Rodriguez
ANAbdul Nadeem
Abdul Nadeem
Mohamed AbdelrahemMohamed Abdelrahem
Mohamed Abdelrahem
Voltage source Multilevel Inverters (MLIs) are vital components for medium voltage and high-power applications due to their advantages like modularity and better power quality. However, the number of components used is significant. In this paper, an improved asymmetrical multilevel inverter topology is proposed producing 17-levels output voltage utilizing two dc sources. The circuit is developed to reduce the number of isolated dc-sources used without reducing output levels. The circuit utilizes six two-quadrant switches, three four-quadrant switches and four capacitors. The capacitors are self-balancing and do not require extra attention, i.e. the control system is simple for the proposed MLI. Detailed analysis of the topology under linear and non-linear loading conditions is carried out. Comparison with other similar topologies shows that the proposed topology is superior in device count, power quality, Total Standing Voltage (TSV), and cost factor. The performance of the topology is validated for different load conditions through MATLAB/Simulink environment and the prototype developed in the laboratory. Furthermore, thermal analysis of the circuit is done, and the losses are calculated via PLECS software. The topology offers a total harmonic distortion (THD) of 4.79% in the output voltage, with all the lower order harmonics being less than 5% complying with the IEEE standards.

6 April 2021 in IET Power Electronics
Verified
Journal Article
Open access
PDF file
MAM Saad Bin Arif
M Saad Bin Arif
UMUvais Mustafa
Uvais Mustafa
MSMarif Daula Siddique
Marif Daula Siddique
SAShahbaz Ahmad
Shahbaz Ahmad
AIAtif Iqbal
Atif Iqbal
SAShahrin bin Ayob
Shahrin bin Ayob
This paper presents an improved Multi‐level Inverter topology utilizing the concept of boosting‐capacitor and two DC sources with reduced switches count for generating 17‐level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other recent topologies shows that the proposed topology employs a reduced number of devices and better performance. The topology combines the modularity of H‐Bridge with the boosting capacity of the switched capacitor topology. Special care is taken while designing the switching strategy for voltage balancing of the capacitors. The authors also have generalized the topology to produce ‘n’ level output. Relevant expressions are also formed and reported. Experimental validation, as well as simulation, is performed, and results are verified. Nearest level control is used as the modulation technique.

28 December 2021 in IET Power Electronics
Verified
Journal Article
Open access
PDF file
UMUvais Mustafa
Uvais Mustafa
M SAAD BIN ARIFM SAAD BIN ARIF
M SAAD BIN ARIF
RKRalph Kennel
Ralph Kennel
Mohamed AbdelrahemMohamed Abdelrahem
Mohamed Abdelrahem
Voltage source multilevel inverters (MLI) is widely utilized in medium and high‐power applications due to their advantages. Here, an 11‐level, asymmetrical multilevel inverter topology is proposed. The topology utilizes four unidirectional switches, three bidirectional switches along with two dc sources. The proposed configuration of switches and the concept of the dc‐link capacitor is utilized to generate eleven level output voltage. The reduced number of components such as power switches and DC sources, lower control complexity due to capacitors' self‐balancing nature, and low total standing voltage (TSV) are the critical features of the proposed topology. Moreover, a reliability assessment of the topology shows that the topology has a high mean time to fault (MTTF), which makes it robust and reliable. Matlab/Simulink environment is used to develop a simulation model of the proposed topology, while PLECS is used for the thermal modelling and analysis of the converter. A prototype is developed and tested in the laboratory to validate the performance for different loading conditions. The proposed topology can be cascaded to produce the ‘ n ’ number of levels. The critical comparison of the proposed topology shows that the proposed circuit has advantages over other compared topologies.

1 September 2020 in Energy Sources, Part A: Recovery, Utilization, and Environmental Effects
Verified
Journal Article
Closed access
UMUvais Mustafa
Uvais Mustafa
IQIbraheem Ahmed Qeays
Ibraheem Ahmed Qeays
M SAAD BIN ARIFM SAAD BIN ARIF
M SAAD BIN ARIF
SYSyed Mohd Yahya
Syed Mohd Yahya
SMShahrin Bin Md.AYob
Shahrin Bin Md.AYob
With the increased power demand, the effort on the efficiency improvement of the existing renewable systems is also increased. One of the available options is the Solar PV-T cogeneration system. Such systems provide an alternative to utilize the extracted heat from the panel. As the electrical efficiency of the PV system mainly depends on the panel used and the power electronics converter efficiency. The panel efficiency increases with the reduction in panel temperature for particular isolation. And the reduction in power losses in the inverter can be achieved by reducing the number of device count of the inverter topology. For this, an efficient multilevel inverter (MLI) topology and nanofluid-based solar PV panel is proposed. The proposed panel uses TiO2 Nano-fluid as the cooling agent. The prototype of the developed panel is tested in the laboratory in which a decrease in panel temperature of 18.7 °C is achieved. Performance of the panel is compared with other experimental studies available as well as with water and airflow fluid in the same environmental condition. Results show that the proposed panel can absorb 27% more heat than airflow panel, and the improvement of about 1.17% in the efficiency of the panel is achieved. An efficient and reliable inverter topology focusing on utilizing a single source is proposed. The developed circuit structure is compared with other existing seven-level topologies, and it is found that the proposed topology utilizes only one dc source with the lowest device count, thus have lower losses. Performance of the system incorporating the developed PV panel and the proposed inverter is verified through required simulation analysis. Results obtained shows that the integrated system works properly with lower converter losses and panel efficiency of 16.38%. Therefore the proposed system is efficient and very much suitable for solar PVT applications.

1 March 2019
Verified
Conference Paper
Closed access
UMUvais Mustafa
Uvais Mustafa
MAM Saad Bin Arif
M Saad Bin Arif
SAShahbaz Ahmad
Shahbaz Ahmad
MTMohd Tariq
Mohd Tariq
SAShahrin Md. Ayob
Shahrin Md. Ayob
In this paper comparative study of a recently proposed 5-Level T-Type Asymmetrical-H-Bridge (5-L-T-AHB) inverter is carried out for different modulation schemes based on PWM switching. The THD and the fundamental component of the output voltage for different modulation schemes at different frequencies is recorded and compared. The main advantage of high frequency PWM switching is that it reduces the THD in output current and voltages of a multi-level inverter. Matlab/Simulink is used for the simulation purpose. The results show that the variable frequency Phase-Opposite-Disposition PWM (PODPWM) modulation scheme based on triangular carrier wave have the minimum THD of 20.06% in voltage at unity modulation index. While the Third-Harmonic-Injected (THI) reference based PWM shows the highest THD of 25.97%. THI based PWM however, offers the highest fundamental component with 12% more output. Variation of THD and fundamental component is also seen for the varying modulation index (0.6-0.9). THD shows the decreasing trend while the fundamental component increases with increment in modulation index.

1 March 2019
Verified
Conference Paper
Closed access
UMUvais Mustafa
Uvais Mustafa
MAM Saad Bin Arif
M Saad Bin Arif
SAShahrin Md. Ayob
Shahrin Md. Ayob
MTMohd Tariq
Mohd Tariq
This paper present a single phase transformer less seven level inverter topology. The topology is based on the modified H-Bridge inverter. One leg of the H-Bridge inverter is kept same producing two level as usual. The second leg is split into three equal parts with the help of two additional branches to gain access to the additional levels. The added branches comprise of the bidirectional switches. Single DC source is converted into three dc-link using capacitors. A level shifted sinusoidal PWM scheme is used for high frequency control. Performance of the proposed circuit is validated using MATLAB/Simulink software with R as well as RL load. Output voltage and current THD is 15.33% and 2.61% for RL load respectively. Based on the number of dc sources and switches used, the proposed topology is compared with other conventional seven level topologies. The results obtained comply with the norms set for the output voltage and current which makes it suitable for various medium and high voltage applications.