Franck Gechter

Dr. Franck Gechter

1. Laboratoire Connaissance et Intelligence Artificielle Distribuées (CIAD), Université Bourgogne Franche-Comté UTBM, 90010 Belfort, France
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orcid

Research Focus & Metrics

Academic Career Length

14Years (2013-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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8 January 2024 in Journal of Imaging
Verified
Journal Article
Open access
PDF file
WAWissam Basim AlKendi
Wissam Basim AlKendi
Franck GechterFranck Gechter
Franck Gechter
LHLaurent Heyberger
Laurent Heyberger
CHRISTOPHE GUYEUXCHRISTOPHE GUYEUX
CHRISTOPHE GUYEUX
Handwritten Text Recognition (HTR) is essential for digitizing historical documents in different kinds of archives. In this study, we introduce a hybrid form archive written in French: the Belfort civil registers of births. The digitization of these historical documents is challenging due to their unique characteristics such as writing style variations, overlapped characters and words, and marginal annotations. The objective of this survey paper is to summarize research on handwritten text documents and provide research directions toward effectively transcribing this French dataset. To achieve this goal, we presented a brief survey of several modern and historical HTR offline systems of different international languages, and the top state-of-the-art contributions reported of the French language specifically. The survey classifies the HTR systems based on techniques employed, datasets used, publication years, and the level of recognition. Furthermore, an analysis of the systems’ accuracies is presented, highlighting the best-performing approach. We have also showcased the performance of some HTR commercial systems. In addition, this paper presents a summarization of the HTR datasets that publicly available, especially those identified as benchmark datasets in the International Conference on Document Analysis and Recognition (ICDAR) and the International Conference on Frontiers in Handwriting Recognition (ICFHR) competitions. This paper, therefore, presents updated state-of-the-art research in HTR and highlights new directions in the research field.

1 October 2018 in IEEE Journal of Emerging and Selected Topics in Power Electronics
Verified
Journal Article
Closed access
CLChen Liu
Chen Liu
RMRui Ma
Rui Ma
HBHao Bai
Hao Bai
ZLZhongliang Li
Zhongliang Li
Franck GechterFranck Gechter
Franck Gechter
Fei GaoFei Gao
Fei Gao
The hardware-in-the-loop simulation plays a vital role in the test of high-power electronic system. Although the application of field-programmable gate array (FPGA) embedded system has enabled the real-time system simulating below 500 ns, the transient characteristic of high-voltage insulated-gate bipolar transistor (HVIGBT) is largely compromised. In this paper, a new piecewise HVIGBT model, considering its driver circuit effect and parasite parameter, is proposed for FPGA-based realtime simulation applications. With the attempt to reduce the simulation latency, we propose an FPGA solver with a parallel structural to divide the system into several layers. The model could not only provide accurate system-level performance of the power electronic converter but also give an insight into the transient behavior effect of high-power electronic system. Finally, a case study about emulation of traction system of high-speed train is also presented. Implementations are made on an FPGA Kintex-7 embedded in National Instruments FlexRIO PXIe-7975. The obtained results show that the proposed modeling algorithm can achieve both accuracy and efficiency within a fixed real-time simulation time step of 25 ns.

22 August 2018 in IEEE Transactions on Transportation Electrification
Verified
Journal Article
Closed access
CLChen Liu
Chen Liu
XGXizheng Guo
Xizheng Guo
RMRui Ma
Rui Ma
ZLZhongliang Li
Zhongliang Li
Franck GechterFranck Gechter
Franck Gechter
Fei GaoFei Gao
Fei Gao
Hardware-in-the-loop (HIL) test provides a timesaving and safe environment for testing high-power electronic systems. But the main difficulty for the HIL test of power electronic system lies on the modeling of the complex and highpower system. This paper proposes a modeling method of the electrical system of high-speed train. With this method, the HIL test platform using field-programmable gate array (FPGA) boards is built. Besides, in order to meet the computing power requirement of the system modeling, we simulate the whole system using two dSPACE simulators and inside each dSPACE simulator, a multi-processor system is achieved through Gigalink connection. The whole HIL system can be used to evaluate both the hardware and software performance of traction control unit (TCU) and auxiliary control unit (ACU). The HIL results under steady state and transient conditions demonstrate modeling accuracy and provide a detailed insight into its development.

1 September 2013 in IET Intelligent Transport Systems
Verified
Journal Article
Open access
PDF file
BDBaudouin Dafflon
Baudouin Dafflon
Franck GechterFranck Gechter
Franck Gechter
PGPablo Gruer
Pablo Gruer
Abderrafiaa KoukamAbderrafiaa Koukam
Abderrafiaa Koukam
Reactive multi‐agent systems are increasingly applied to problem solving, modelling and simulation. Among the benefits of this approach, there is the capability to solve complex problems, whereas maintaining functional and conceptual simplicity of involved entities. Many examples have shown that approaches based on multi‐agent systems are effective in solving complex problems such as life simulation and multi‐robot cooperation for instance. Side‐by‐side vehicle platoon systems, which are studied in this article, can be adopted as a representative example of this class of applications. Based on preceding works, this study presents a local platoon control approach with obstacle avoidance. The proposed vehicle decision‐making process is considered as a multi‐agent system, the agents of which make collectively the best decision considering the perceived constraints and the preceding vehicle position and speed.