An offset reduction technique using floating gate technology and LMS algorithm is presented. Offset reduction in operational amplifiers is achieved by programming two floating gate transistors that form an important part of a single-stage folded cascode amplifier. Floating-gate transistors were programmed for a minimum offset voltage of ±25μV using 1.2μm CMOS process. Programmed operational amplifiers can be used in continuous-time operation for a long period of time without the need of reprogramming. Experimental results show that LMS algorithm can be used to program efficiently floating-gate transistor in order to reduce offset voltage in operational amplifiers.

An online failure diagnostic test is essential to ensure the robustness and reliability of high-powered systems. Furthermore, the overall design must comprise diagnostic strategies to detect in-service and high-powered module defects. This paper describes the critical failure mechanisms––cross-conduction, inductive avalanche, second turn-on, VS-undershoot, inrush current, and thermal runaway––that directly affect insulated gate bipolar transistor (IGBT) operation. The constructed inverter contains 18 transformer-based taps (six per phase); however, this work studied a single tap (IGBT-based full-bridge module) to understand the reasons for failure and the routes to mitigate them. Moreover, a cost-effective solution using the IR2127STRPBF driver circuit was implemented to reduce the probability of thermal runaway in case of overcurrent, short-circuit, or avalanche events. For this reason, the electrical current state was adjusted using an FPGA digital resource to perform dynamic PWM control signals. The obtained correlation waveforms are valuable for verifying diagnostic data at the design stage to emphasize the significance of evading premature failure events. The comprehensive study on failure diagnosis enabled successful design strategies to construct a robust 45 kVA three-phase multilevel inverter for a 22 kW eolic-photovoltaic generation plant.

A very low offset voltage operational amplifier that can be field programmable is described. Offset reduction is achieved by programming two floating gate transistors that form an important part of a single-stage folded cascode amplifier. A novel programming method that requires just four additional pins and an LMS algorithm was used. Floating-gate transistors were programmed for a minimum offset voltage of ± 20 ¿V using 1.2 ¿m CMOS process. Programmed operational amplifiers can be used in continuous-time operation for a long period of time without the need of reprogramming. Experimental results show that this offset reduction scheme is a viable approach to low cost precision operational amplifier fabrication.

This paper presents the performance of optimal filtering; LMS with a nonvolatile analog memory cell fabricated through 1.2um CMOS process, for the adaptive identification signal problem, where transfer functions are unknown and changing. The memory stores the weight in the filter as charge on the floating gate of a transistor pMOS. The update is linear, using a pulse density modulation scheme by means of tunneling and injection mechanisms. The LMS algorithm is implemented digitally off chip, and it does not require the signal to be piecewise stationary, and requires no manual operation other than selection of the step-size.

Isolated multilevel inverters are widely used in renewable energy systems and industrial applications. Isolated IGBT topologies exploit the usage of low-frequency transformers that improve robustness and reliability. However, critical failure mechanisms should be considered at the design stage to ensure proper performance. This paper describes these critical failure mechanisms, such as short circuit, cross-conduction, IGBT high inductive load avalanche, IGBT second turn-on, VS-undershoot, transformer inrush current, IGBT thermal runaway, and cable switching interference. Furthermore, this paper comprises design techniques to prevent these failures. The previous failure mechanisms come from the inverter's power stage, except switching interference from control signal cables and directly affecting the control device functionality. This work also proposes a circuit topology based on FPGA resources to reduce switching interference from control signal cables. It behaves like a fault tolerant digital input that effectively filters bouncing events shorter than 2μs. Measurements report satisfactory experimental results upon constructing a 45kVA ac-side-isolated 13-level inverter.

In this paper, a Least Mean Square (LMS) programming scheme is used to set the offset voltage of two operational amplifiers that were built using floating-gate transistors, enabling a 0.95 V_RMS trimmer-less flame detection sensor. The programming scheme is capable of setting the offset voltage over a wide range of values by means of electron injection. The flame detection sensor consists of two programmable offset operational amplifiers; the first amplifier serves as a 26 μV offset voltage follower, whereas the second amplifier acts as a programmable trimmer-less voltage comparator. Both amplifiers form the proposed sensor, whose principle of functionality is based on the detection of the electrical changes produced by the flame ionization. The experimental results show that it is possible to measure the presence of a flame accurately after programming the amplifiers with a maximum of 35 LMS-algorithm iterations. Current commercial flame detectors are mainly used in absorption refrigerators and large industrial gas heaters, where a high voltage AC source and several mechanical trimmings are used in order to accurately measure the presence of the flame.