In the dynamic fields of semiconductor design and digital system development, effective verification procedures are in high demand. In particular, functional verification is essential for space systems to guarantee mission success, prevent errors in intricate environments, and uphold the reliability vital for effective space exploration. Testing phase results extremely challenging because of the high complexity of systems, often due to the intricate interplay of hardware, software, and environmental factors, impeding comprehensive validation. This paper presents an innovative methodology for the functional verification of systems involved in space telecommunications: this is based on the development and integration of software Twin Models within advanced and automated verification environments, with the dual purpose of simplifying the stimulation of the Design Under Test (DUT) and producing instant-by-instant expected behavior. The proposed solutions are developed in SystemVerilog Hardware Verification Language (HVL) and are fully compliant with Universal Verification Methodology (UVM) standard. As proof of the effectiveness and applicability of this approach, examples of verification environments for different systems are given, including high-speed interfaces, such as SpaceWire (SpW) CODECs, and high-speed encoders and modulators for both Direct-to-Earth and inter-satellite communications applications. A test campaign was conducted for all these systems, and using the Twin Models made it possible to achieve 100% of both functional and code coverage. The final result is a significant simplification in the creation of tests and DUT debugging and a very highly flexible, self-checking, and automated verification environment able to test any possible DUT configuration efficiently.

The on-board communication standard adopted in current generation space missions of the European Space Agency, and many other agencies as well, is SpaceWire (SpW). In a SpW network, data are exchanged as well-formed packets, whose structure offers low packet overhead and allows developers to tailor their implementation for SpW applications. The development of SpW-compliant devices requires a specific set of test instruments, namely Electrical Ground Support Equipment (EGSE), to verify the correct functionality of SpW units under test. An example of a SpW EGSE is the SpaceART EGSE Emulator, an EGSE for generation and processing of SpW packets for a time-constrained use-case scenario. This EGSE has been developed to address a mission-related SpW communication between a device and an Instrument Control Unit (ICU). It has allowed the generation and processing of specific SpW packets, which cannot be provided by the mostly used general-purpose SpW EGSEs. In this scope, the SpaceART SpW Sniffer, a SpW link analyser for unobtrusive monitoring of SpW link, has been employed to run a comprehensive set of tests and provide further information on the considered scenario. The SpaceART EGSE Emulator-ICU communication has been thoroughly tested through the SpaceART SpW Sniffer, unobtrusively analysing the exchanged data and allowing to assess the compliance with the defined time constraints from an external point of view. The use of the Sniffer has been crucial for testing the on-board communication, providing important support for the success of the mission employing the tested ICU.

This paper describes how different IP Cores for on-board high-speed data interfaces have been developed and verified by IngeniArs S.r.l. These are the CODECs and Routers implementing SpaceWire and SpaceFibre communication protocols, i.e., the actual state-of-the-art for on-board data exchange in space applications. In addition, the WizardLink Front-End is presented.These IP Cores have not only been integrated into the space flight hardware of various European Space Agency missions, but have also been used for Electrical Ground Support Equipment (EGSE) implementation and in validation environments for other IP Cores, such as high-speed encoders and modulators.

In recent years, missions requiring payload telemetry data transmission to ground stations have increasingly demanded a higher bandwidth. Traditional ranging techniques for spacecraft position determination often use a dedicated spectrum, reducing the available bandwidth for telemetry. To overcome this limitation, a transmission system capable of simultaneously sending high data-rate telemetry and ranging signals within the same bandwidth represents a key advancement for modern space missions, particularly Lagrangian science missions and planetary probes. To enhance the technological readiness of such a system, a hardware demonstrator has been developed using the AMD Xilinx (San Jose, CA, USA) ZCU111 Field Programmable Gate Array (FPGA), selected for its high-speed digital signal processing capabilities and integrated converters. The system, in this preliminary breadboarding phase, operates at a fixed telemetry rate of 4.25 Msym/s and a ranging rate of 2.987 Mchip/s, constrained within a 10 MHz bandwidth typical for science missions. Despite these limitations, tests demonstrated that integrating telemetry with Pseudo Noise (PN) Ranging introduces negligible implementation losses compared to telemetry-only transmission. The system also supports high-order modulations up to 64-APSK, improving spectral efficiency within the available bandwidth. Although some limitations have been found in the use of very high-order modulations, this prototype demonstrates the feasibility of integrating advanced coding techniques with PN Ranging.