Masiar Sistani

Dr. Masiar Sistani

orcid

Research Focus & Metrics

Academic Career Length

10Years (2017-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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8 July 2019 in ACS Nano
Verified
Journal Article
Closed access
MSMichael Seifner
Michael Seifner
ADAlain Dijkstra
Alain Dijkstra
JBJohannes Bernardi
Johannes Bernardi
ASAndreas Steiger-Thirsfeld
Andreas Steiger-Thirsfeld
MSMasiar Sistani
Masiar Sistani
SBSven Barth
Sven Barth

27 October 2021 in ACS Nano
Verified
Journal Article
Closed access
MSMasiar Sistani
Masiar Sistani
RBRaphael Böckle
Raphael Böckle
DFDavid Falkensteiner
David Falkensteiner
Anh Minh LUONGAnh Minh LUONG
Anh Minh LUONG
MHMartien I. Den Hertog
Martien I. Den Hertog
WWWalter M. Weber
Walter M. Weber

22 July 2017 in Nano Letters
Verified
Journal Article
Open access
MSMasiar Sistani
Masiar Sistani
PSPhilipp Staudinger
Philipp Staudinger
JGJohannes Greil
Johannes Greil
MHMartin Holzbauer
Martin Holzbauer
HDHermann Detz
Hermann Detz
ALAlois Lugstein
Alois Lugstein
Conductance quantization at room temperature is a key requirement for the utilizing of ballistic transport for, e.g., high-performance, low-power dissipating transistors operating at the upper limit of “on”-state conductance or multivalued logic gates. So far, studying conductance quantization has been restricted to high-mobility materials at ultralow temperatures and requires sophisticated nanostructure formation techniques and precise lithography for contact formation. Utilizing a thermally induced exchange reaction between single-crystalline Ge nanowires and Al pads, we achieved monolithic Al–Ge–Al NW heterostructures with ultrasmall Ge segments contacted by self-aligned quasi one-dimensional crystalline Al leads. By integration in electrostatically modulated back-gated field-effect transistors, we demonstrate the first experimental observation of room temperature quantum ballistic transport in Ge, favorable for integration in complementary metal–oxide–semiconductor platform technology.

30 January 2018 in ACS Nano
Verified
Journal Article
Open access
MSMichael Seifner
Michael Seifner
MSMasiar Sistani
Masiar Sistani
FPFabrizio Porrati
Fabrizio Porrati
GPGiorgia Di Prima
Giorgia Di Prima
PPPatrik Pertl
Patrik Pertl
SBSven Barth
Sven Barth
A low temperature chemical vapor deposition (CVD) growth of Ge nanowires using Ga as seed material is demonstrated. The structural and chemical analysis reveals the homogeneous incorporation of ~3.5 at% Ga in the Ge NWs. The Ga-containing Ge nanowires behave like metallic conductors with resistivity values down to ~300 µΩcm due to Ga hyperdoping with electronic contributions of one third of the incorporated Ga atoms. This is the highest conduction values observed by in situ doping of group IV nanowires reported to date. This work demonstrates that Ga is both an efficient seed material at low temperatures for Ge nanowire growth and an effective dopant rendering the semiconductor into a metal-like conductor.

30 June 2020 in ACS Photonics
Verified
Journal Article
Open access
MSMasiar Sistani
Masiar Sistani
MBMaximilian G. Bartmann
Maximilian G. Bartmann
NGNicholas A. Güsken
Nicholas A. Güsken
RORupert F. Oulton
Rupert F. Oulton
HKHamid Keshmiri
Hamid Keshmiri
ALAlois Lugstein
Alois Lugstein
Recent advances in guiding and localizing light at the nanoscale exposed the enormous potential of ultra-scaled plasmonic devices. In this context, the decay of surface plasmons to hot carriers triggers a variety of applications in boosting the efficiency of energy-harvesting, photo-catalysis and photo-detection. However, a detailed understanding of plasmonic hot carrier generation and particularly the transfer at metal-semiconductor interfaces is still elusive. In this paper, we introduce a monolithic metal-semiconductor (Al-Ge) heterostructure device, providing a platform to examine surface plasmon decay and hot electron transfer at an atomically sharp Schottky nanojunction. The gated metal-semiconductor heterojunction device features electrostatic control of the Schottky barrier height at the Al-Ge interface, enabling hot electron filtering. The ability of momentum matching and to control the energy distribution of plasmon-driven hot electron injection is demonstrated by controlling the interband electron transfer in Ge leading to negative differential resistance.

17 April 2023 in Advanced Electronic Materials
Verified
Journal Article
Open access
AFAndreas Fuchsberger
Andreas Fuchsberger
LWLukas Wind
Lukas Wind
MSMasiar Sistani
Masiar Sistani
RBRaphael Behrle
Raphael Behrle
DNDaniele Nazzari
Daniele Nazzari
WWWalter M. Weber
Walter M. Weber
Reconfigurable field‐effect transistors, capable of being dynamically programmed during run‐time, overcome the static nature of conventional complementary metal‐oxide semiconductors by reducing the transistor count and the circuit path delay. Thereby, SiGe and Ge are predicted to boost drive currents, switching speed and to reduce power consumption. Nevertheless, Ge‐based reconfigurable field‐effect transistor prototypes have so far fallen short in reaching both the promised performance due to interface instability to their contacts and gate oxides, as well as in reaching the current–voltage symmetry necessary for circuit applicability. Here, a top‐down fabricated SiGe‐based reconfigurable transistor technology is reported that is comprised of a vertical Si‐Si0.67Ge0.33 heterostructure enabling the envisioned high and symmetric on‐currents of both n‐ and p‐type operation. Monolithic integration with single‐elementary crystalline Al contacts alleviates process variability compared to conventional Ni‐silicide/Ni‐germanide contacts and introduces an ultra‐thin Si interlayer providing stability and equal injection efficiency of holes and electrons. The implementation of a three top‐gate transistor in combination with a hysteresis‐free Si/SiO2/HfO2 gate stack enhances polarity control and leakage current suppression to limit static power dissipation. Importantly, the obtained Al‐Si‐SiGe multi‐heterojunction and advanced reconfigurable transistor design is the first Ge‐based technology showing the envisioned stability and performance enhancements.